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Committee Date Time Place Paper Title / Authors Abstract Paper #
SDM, ICD, ITE-IST [detail] 2018-08-07
12:55		 Hokkaido Hokkaido Univ., Graduate School of IST M Bldg., M151 [Invited Talk] Development of SiGe-MEMS-on-CMOS technology for ultra-low-power inertial sensors
Hideyuki Tomizawa, Yoshihiko Kurui (Toshiba), Ippei Akita (AIST), Akira Fujimoto, Tomohiro Saito, Akihiro Kojima, Hideki Shibata (Toshiba) SDM2018-29 ICD2018-16		 In this paper, for the first time we demonstrate the material benefits of SiGe for MEMS applications based on the result... [more] SDM2018-29 ICD2018-16
pp.21-24
SDM 2013-02-04
14:30		 Tokyo Kikai-Shinko-Kaikan Bldg. Wafer-level Chip Scale Package for White LED with High Thermal Dissipation
Yosuke Akimoto, Akihiro Kojima, Miyoko Shimada, Hideyuki Tomizawa, Hideto Furuyama, Susumu Obata, Kazuhito Higuchi, Yoshiaki Sugizaki, Hideki Shibata (Toshiba) SDM2012-154		 We proposed a novel wafer-level chip scale packaging technology for white LED, which enables high thermal dissipation fo... [more] SDM2012-154
pp.21-24
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]		 2011-11-28
13:50		 Miyazaki NewWelCity Miyazaki [Invited Talk] An RF-MEMS tunable capacitor with CMOS driver IC
Yoshiaki Sugizaki, Tamio Ikehashi, Hiroaki Yamazaki, Tomohiro Saito, Etsuji Ogawa, Yoshiaki Shimooka, Hideki Shibata (Toshiba) CPM2011-151 ICD2011-83		  [more] CPM2011-151 ICD2011-83
pp.13-18
SDM 2011-02-07
12:40		 Tokyo Kikai-Shinko-Kaikan Bldg. A highly reliable Cu interconnect with CuSiN and Ti-based barrier metal: Impact of oxgen surface treatment
Yumi Hayashi, Noriaki Matsunaga, Makoto Wada, Shinichi Nakao, Kei Watanabe, Satoshi Kato, Atsuko Sakata, Akihiro Kajita, Hideki Shibata (Toshiba Corp.) SDM2010-219		 A trade-off property of CuSiN between EM improvement and line resistance increase was resolved by a breakthrough that le... [more] SDM2010-219
pp.19-23
SDM 2010-02-05
14:00		 Tokyo Kikai-Shinko-Kaikan Bldg. Low resistive and highly reliable copper interconnects in combination of silicide-cap with Ti-barrier for 32 nm-node and beyond
Yumi Hayashi, Noriaki Matsunaga, Makoto Wada, Shinichi Nakao, Atsuko Sakata, Kei Watanabe, Hideki Shibata (Toshiba) SDM2009-187		 Silicide-cap for Cu interconnects is promising for enhancing electromigration (EM) performance for 32 nm-node and beyond... [more] SDM2009-187
pp.31-36
SDM 2009-11-13
11:15		 Tokyo Kikai-Shinko-Kaikan Bldg. A Novel Monte Carlo Simulation to Evaluate the Size Effect of Resistivity for Scaled Metallic Interconnects
Takashi Kurusu, Makoto Wada, Noriaki Matsunaga, Akihiro Kajita, Hiroyoshi Tanimoto, Nobutoshi Aoki, Yoshiaki Toyoshima, Hideki Shibata (Toshiba Corp.) SDM2009-145		 Recently, the size effect on resistivity in very narrow and thin metallic wires is a crucial problem on development of s... [more] SDM2009-145
pp.55-60
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