Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
EST |
2016-05-20 15:25 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
OpenCL-Based FPGA Platform for FDTD Computation Hasitha Muthumala Waidyasooriya, Masanori Hariyama, Yasuo Ohtera (Tohoku Univ.) EST2016-4 |
We propose a FPGA accelerator for FDTD (finite difference time domain) computation based on a pipelined architecture to ... [more] |
EST2016-4 pp.17-20 |
RECONF |
2016-05-19 10:05 |
Kanagawa |
FUJITSU LAB. |
Succinct-Data-Structure Based on Block-Size-Constrained Compression for a Text-Search Accelerator Masanori Hariyama, Hasitha Muthumala Waidyasooriya (Tohoku Univ.) RECONF2016-2 |
Succinct data structures are introduced to efficiently solve a given problem while representing the data using as a litt... [more] |
RECONF2016-2 pp.3-8 |
RECONF |
2016-05-19 10:25 |
Kanagawa |
FUJITSU LAB. |
Design of an FPGA Platform for Stencil Computation Using OpenCL Hasitha Muthumala Waidyasooriya, Masanori Hariyama (Tohoku Univ.) RECONF2016-3 |
Stencil computation is widely used in scientific computations. Its processing speed is usually restricted by the externa... [more] |
RECONF2016-3 pp.9-12 |
RECONF |
2016-05-19 10:45 |
Kanagawa |
FUJITSU LAB. |
Design of an FPGA-based Accelerator for Moleculer Dynamics Using OpenCL Hasitha Muthumala Waidyasooriya, Masanori Hariyama (Tohoku Univ.), Kota Kasahara (Osaka Univ.) RECONF2016-4 |
Molecular dynamics (MD) simulations are very important to study physical properties of atoms and molecules. However, a h... [more] |
RECONF2016-4 pp.13-16 |
RECONF |
2014-06-12 09:50 |
Miyagi |
Katahira Sakura Hall |
Highly-Parallel FPGA Accelerator for DNA Sequence Alignment Using the Burrows-Wheeler Algorithm Hasitha Muthumala Waidyasooriya, Masanori Hariyama, Michitaka Kameyama (Tohoku Univ.) RECONF2014-4 |
The mapping of millions of short DNA fragments to a large genome is a very important aspect of the modern bioinformatics... [more] |
RECONF2014-4 pp.17-20 |
EMCJ, IEE-EMC, MW, EST [detail] |
2013-10-24 15:45 |
Miyagi |
Tohoku Univ. |
Design of an FPGA-Based FDTD Accelerator Using OpenCL Yasuhiro Takei, Hasitha Muthumala Waidyasooriya, Masanori Hariyama, Michitaka Kameyama (Tohoku Univ.) EMCJ2013-73 MW2013-113 EST2013-65 |
High-performance computing systems with dedicated hardware on FPGAs can achieve power efficient computations compared wi... [more] |
EMCJ2013-73 MW2013-113 EST2013-65 pp.73-76 |
RECONF |
2012-09-19 10:40 |
Shiga |
Epock Ritsumei 21, Ritsumeikan Univ. |
Low-Power Heterogeneous Platform for High Performance Computing and Its Application to 2-D FDTD Computation Masanori Hariyama, Hasitha Muthumala Waidyasooriya, Yasuhiro Takei, Michitaka Kameyama (Tohoku Univ.) RECONF2012-39 |
[more] |
RECONF2012-39 pp.89-93 |
ICD, IE, SIP, IPSJ-SLDM [detail] |
2011-10-25 13:30 |
Miyagi |
Ichinobo(Sendai) |
FPGA Platform for Heterogeneous Multicore Processors with MIMD-ALU-array-type Dynamically Reconfigurable Accelerators Yasuhiro Takei, Hasitha Muthumala Waidyasooriya, Masanori Hariyama, Michitaka Kameyama (Tohoku Univ.) SIP2011-73 ICD2011-76 IE2011-72 |
Heterogeneous multi-core architectures with CPUs and accelerators attract many attentions since they can achieve energy-... [more] |
SIP2011-73 ICD2011-76 IE2011-72 pp.73-76 |
ICD, IE, SIP, IPSJ-SLDM [detail] |
2011-10-25 13:55 |
Miyagi |
Ichinobo(Sendai) |
Data-Transfer-Aware Memory Allocation for Dynamically Reconfigurable Accelerators in Heterogeneous Multicore Processors Yosuke Ohbayashi, Hasitha Muthumala Waidyasooriya, Masanori Hariyama, Michitaka Kameyama (Tohoku Univ.) SIP2011-74 ICD2011-77 IE2011-73 |
Accelerator cores in low-power heterogeneous multicore processors have multiple memory modules to increase the data acce... [more] |
SIP2011-74 ICD2011-77 IE2011-73 pp.77-82 |
ICD, IE, SIP, IPSJ-SLDM [detail] |
2011-10-25 15:55 |
Miyagi |
Ichinobo(Sendai) |
Simultaneous Optimization of a CDFG Structure and a Schedule Based on Super-node Representation Akira Hirata, Hasitha Muthumala Waidyasooriya, Masanori Hariyama, Michitaka Kameyama (Tohoku Univ.) SIP2011-77 ICD2011-80 IE2011-76 |
In high-level synthesis, control-data flow graphs(CDFGs) are frequently used to describe the behavior of circuits since ... [more] |
SIP2011-77 ICD2011-80 IE2011-76 pp.101-105 |
ICD, IPSJ-ARC |
2011-01-21 11:40 |
Kanagawa |
Keio University (Hiyoshi Campus) |
Acceleration of Block Matching by using Multiple Alignments on Heterogeneous Multi-Core Processor Yoshitaka Hiramatsu (Hitachi), Hasitha Muthumala Waidyasooriya, Masanori Hariyama (Tohoku Univ.), Tohru Nojiri, Kunio Uchiyama (Hitachi) |
The large data-transfer time among different cores and data-supply time to arithmetic unit is a big problem in heterogen... [more] |
ICD2010-136 pp.57-62 |
VLD |
2010-09-27 14:25 |
Kyoto |
Kyoto Institute of Technology |
Accelerator-Centric Task Allocation Based on Algorithm Transformation for Heterogeneous Multicore Processors Masanori Hariyama, Hasitha Muthumala Waidyasooriya, Michitaka Kameyama (Tohoku Univ.) VLD2010-43 |
Heterogeneous multi-core processors are attracted by the media processing applications
due to their capability of drawi... [more] |
VLD2010-43 pp.7-12 |
ICD, IPSJ-ARC, IPSJ-EMB |
2010-01-29 13:50 |
Tokyo |
T.B.D. |
FPGA-Oriented Heterogeneous Multi-core Processor:SIMD-Accelerator Core and Its Evaluation Masanori Hariyama, Hasitha Muthumala Waidyasooriya, Takehisa Matsuda, Michitaka Kameyama (Tohoku Univ.) ICD2009-112 |
[more] |
ICD2009-112 pp.105-108 |
ICD, IPSJ-ARC, IPSJ-EMB |
2009-01-14 10:45 |
Osaka |
Shoushin Kaikan |
Evaluation of a Heterogeneous Multi-Core Architecture for Multimedia Applications Daisuke Okumura, Hasitha Muthumala Waidyasooriya, Takehisa Matsuda, Masanori Hariyama, Michitaka Kameyama (Tohoku Univ.) ICD2008-139 |
Heterogeneous processors are attracted by the image processing and recognition applications due to their capability of d... [more] |
ICD2008-139 pp.57-62 |
ICD, IPSJ-ARC |
2007-06-01 13:45 |
Kanagawa |
|
GA-Based Assignment of Supply and Threshold Voltages and Interconnection Simplification for Low Power VLSI Design Hasitha Muthumala Waidyasooriya, Masanori Hariyama, Michitaka Kameyama (Tohoku Univ.) ICD2007-31 |
This paper presents a method to minimize the total energy consumption under time and area constraints, considering inter... [more] |
ICD2007-31 pp.85-90 |