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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 12 of 12  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
IT 2017-09-08
09:25
Yamaguchi Centcore Yamaguchi Hotel Solving the Dihedral Hidden Subgroup Problem
Hachiro Fujita (Tokyo Metropolitan Univ.) IT2017-39
 [more] IT2017-39
pp.5-9
IT 2014-07-17
12:35
Hyogo Kobe University Secrecy Capacity of a Class of Wiretap Channels with Side Information at the Transmitter
Hachiro Fujita (Tokyo Metropolitan Univ.) IT2014-15
 [more] IT2014-15
pp.21-24
ISEC 2013-09-13
15:30
Tokyo Kikai-Shinko-Kaikan Bldg. (t, n)-Threshold Progressive Visual Cryptography Scheme
Wenjuan Wang, Hachiro Fujita (Tokyo Metropolitan Univ.) ISEC2013-55
 [more] ISEC2013-55
pp.29-36
IT 2012-07-20
16:15
Aichi Toyota Technological Institute Writing on Dirty Paper with Feedback
Hachiro Fujita (Tokyo Metropolitan Univ.) IT2012-28
 [more] IT2012-28
pp.115-118
WBS, IT, ISEC 2009-03-09
16:45
Hokkaido Hakodate Mirai Univ. Sharing Multilevel Secrets among Groups Using Concatenation of Reed-Solomon Codes
Hachiro Fujita (Tokyo Metropolitan Univ.), Chigusa Kawashima (Univ. of Electro-Comm.), Tomoko K. Matsushima (Polytechnic Univ.) IT2008-54 ISEC2008-112 WBS2008-67
 [more] IT2008-54 ISEC2008-112 WBS2008-67
pp.65-70
IT 2008-07-25
09:55
Chiba University of Tokyo, Kashiwa Campus (口頭発表)A Note on the Classical-Quantum Slepian-Wolf Problem
Hachiro Fujita (Tokyo Metropolitan Univ.)
 [more]
CS, SIP, CAS 2008-03-07
13:00
Yamaguchi Yamaguchi University [Poster Presentation] On a parallel architecture towards TOPS DSP built by a first-generation DSP
Bin Wu, Takao Nishitani, Hiroshi Suzuki, Hachiro Fujita (Tokyo Metro. Univ.) CAS2007-148 SIP2007-223 CS2007-113
This paper describes the advantage of super-parallel DSP architecture [1],[2] and its implementation by FPGA. High speed... [more] CAS2007-148 SIP2007-223 CS2007-113
pp.103-104
ISEC, IT, WBS 2008-02-29
14:15
Tokyo   Concentrating Entanglement by Random Measurement
Hachiro Fujita (Tokyo Metro Univ.) IT2007-42 ISEC2007-139 WBS2007-73
 [more] IT2007-42 ISEC2007-139 WBS2007-73
pp.67-71
SIP, ICD, IE, IPSJ-SLDM
(Joint) [detail]
2007-10-25
16:00
Fukushima Aidu-Higasiyama-Onsen Kuturogijuku Study on a TOPS scale DSP
Hiroshi Suzuki, Takao Nishitani, Wu Bin, Hachiro Fujita (TMU) SIP2007-119 ICD2007-108 IE2007-78
 [more] SIP2007-119 ICD2007-108 IE2007-78
pp.53-58
CAS 2007-01-29
14:35
Ehime Ehime Univ. Study on a TOPS DPS Architecture
Hiroshi Suzuki, Takao Nishitani, Hachiro Fujita (TMU)
This paper introduces low power parallel processor architecture for image processing. When assuming to make first genera... [more] CAS2006-65
pp.19-24
WBS, IT, ISEC 2006-03-17
14:15
Aichi Nagoya Univ. Several Classes of Concatenated Quantum Codes: Constructions and Bounds
Hachiro Fujita (Univ. of Tokyo)
 [more] IT2005-128 ISEC2005-185 WBS2005-142
pp.195-200
IT, WBS, ISEC 2005-03-17
13:25
Kyoto Kyoto Univ. An algebraic method for constructing efficiently encodable irregular LDPC codes
Hachiro Fujita, Maki Ohata, Kohichi Sakaniwa (Tokyo Inst. of Tech.)
 [more] IT2004-61 ISEC2004-117 WBS2004-176
pp.67-72
 Results 1 - 12 of 12  /   
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