| IEICE Technical Committee Submission System Conference Schedule |
Online Proceedings [Sign in] Tech. Rep. Archives |
All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| ICD | 2010-04-22 09:00 |
Kanagawa | Shonan Institute of Tech. | [Invited Talk]
A Configurable SRAM with Constant-Negative-Level Write Buffer for Low Voltage Operation with 0.149μm2 Cell in 32nm High-k Metal Gate CMOS Yuki Fujimura, Osamu Hirabayashi, Takahiko Sasaki, Azuma Suzuki, Atsushi Kawasumi, Yasuhisa Takeyama, Keiichi Kushida, Gou Fukano, Akira Katayama, Yusuke Niki, Tomoaki Yabe (Toshiba Corp.)  ICD2010-1 |
This paper presents a configurable SRAM for low voltage operation with Constant-Negative-Level Write Buffer (CNL-WB) and... [more] | ICD2010-1 pp.1-6 |
| ICD | 2009-04-14 10:15 |
Miyagi | Daikanso (Matsushima, Miyagi) | A Process-Variation-Tolerant Dual-Power-Supply SRAM with 0.179μm2 Cell in 40nm CMOS Using Level-Programmable Wordline Driver Yuki Fujimura, Osamu Hirabayashi, Atsushi Kawasumi, Azuma Suzuki, Yasuhisa Takeyama, Keiichi Kushida, Takahiko Sasaki, Akira Katayama, Gou Fukano, Takaaki Nakazato, Yasushi Shizuki, Natsuki Kushiyama, Tomoaki Yabe (Toshiba Co.) ICD2009-5 |
We present a dual-power-supply SRAM with 0.179$\mu$m2 cell in 40nm CMOS, which is 10% smaller than the SRAM scaling tren... [more] | ICD2009-5 pp.21-26 |
| ICD | 2008-04-17 09:25 |
Tokyo | [Invited Talk]
A Single-Power-Supply 0.7V 1GHz 45nm SRAM with an Asymmetrical Unit β-ratio Memory Cell Takahiko Sasaki, Atsushi Kawasumi, Tomoaki Yabe, Yasuhisa Takeyama, Osamu Hirabayashi, Keiichi Kushida (Toshiba Corp.), Akihito Tohata (Toshiba Microelectronics Corp.), Akira Katayama, Gou Fukano, Yuki Fujimura, Nobuaki Otsuka (Toshiba Corp.) ICD2008-1 |
A single-power supply $64kB$ SRAM is fabricated in a $45nm$ bulk CMOS technology. The SRAM operates at $1GHz$ with a $0.... [more] | ICD2008-1 pp.1-6 |
|
[Return to Top Page]