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Committee Date Time Place Paper Title / Authors Abstract Paper #
VLD, DC, RECONF, ICD, IPSJ-SLDM [detail] 2022-11-30
14:20
Kumamoto  
(Primary: On-site, Secondary: Online)
On the performance evaluation of a PUF circuit using the Delay Testable Circuit under temperature effects
Eisuke Ohama, Hiroyuki Yotsuyanagi, Masaki Hashizume (Tokushima Univ.) VLD2022-46 ICD2022-63 DC2022-62 RECONF2022-69
In this study, we have proposed a method to make the design-for-testability circuity function as a security mechanism by... [more] VLD2022-46 ICD2022-63 DC2022-62 RECONF2022-69
pp.156-161
DC 2022-03-01
11:20
Tokyo Kikai-Shinko-Kaikan Bldg.
(Primary: On-site, Secondary: Online)
Applicability Evaluation of the Delay Testable Circuit to PUF
Eisuke Ohama, Haruka Chino, Hiroyuki Yotuyanagi, Masaki Hashizume (Tokushima Univ.) DC2021-68
 [more] DC2021-68
pp.24-29
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