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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
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Committee Date Time Place Paper Title / Authors Abstract Paper #
SDM 2017-11-09
11:00
Tokyo Kikai-Shinko-Kaikan Bldg. [Invited Talk] SISPAD 2017 Review (1)
Akira Hiroki (Kyoto Inst. Tech.) SDM2017-62
 [more] SDM2017-62
pp.5-10
SDM 2017-11-10
14:30
Tokyo Kikai-Shinko-Kaikan Bldg. [Invited Talk] An Accurate Metric to Control Time Step of Transient Device Simulation by Matrix Exponential Method
Shigetaka Kumashiro, Tatsuya Kamei, Akira Hiroki, Kazutoshi Kobayashi (KIT) SDM2017-70
An accurate metric for the time step control in the power device transient simulation is proposed. This metric contains ... [more] SDM2017-70
pp.47-52
SDM 2012-11-16
10:00
Tokyo Kikai-Shinko-Kaikan Bldg An Estimation of the Carrier Mobility Model Influenced by Inversion Charge Confinement for Sub-20nm MOSFETs
Masahiro Yamamoto, Akira Hiroki, Jong Chul Yoon (KIT) SDM2012-104
An effective mobility model used in the MASTAR program, which has been used to predict the device characteristics in the... [more] SDM2012-104
pp.25-30
SDM 2011-11-11
15:20
Tokyo Kikai-Shinko-Kaikan Bldg. Gate Voltage Dependence of Channel Length Modulation Coefficient for Nanoscale MOSFETs
Akira Hiroki, Jong Chul Yoon (Kyoto Institute of Tech.) SDM2011-128
In modeling the drain current for nanoscale MOSFETs, the channel length modulation coefficient $\lambda$, which characte... [more] SDM2011-128
pp.75-80
SDM 2011-11-11
15:45
Tokyo Kikai-Shinko-Kaikan Bldg. Higher-order Effects of Source and Drain Parasitic Resistances for Nanoscale MOSFETs
Jong Chul Yoon, Akira Hiroki (Kyoto Institute of Tech.) SDM2011-129
Higher-order effects of source and drain parasitic resistances have been investigated for nanoscale MOSFETs. We have der... [more] SDM2011-129
pp.81-85
 Results 1 - 5 of 5  /   
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