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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| LQE, OPE, CPM, EMD, R | 2019-08-22 16:45 |
Miyagi | [Invited Talk]
3D Flash Memory Cell Reliability Yuichiro Mitani, Harumi Seki, Takanori Asano, Yasushi Nakasaki (Toshiba Memory)  R2019-26 EMD2019-24 CPM2019-25 OPE2019-53 LQE2019-31 |
As conventional planar NAND flash memories are limited from physical and electrical scaling point of view, the three-dim... [more] | R2019-26 EMD2019-24 CPM2019-25 OPE2019-53 LQE2019-31 pp.35-38 |
|
| SDM, ICD, ITE-IST [detail] | 2019-08-09 13:25 |
Hokkaido | Hokkaido Univ., Graduate School /Faculty of Information Science and | [Invited Talk]
Demonstration of Ag Ionic Memory Cell Array for Terabit-Scale High-Density Application Reika Ichihara, Shosuke Fujii, Takuya Konno, Marina Yamaguchi, Harumi Seki, Hiroki Tanaka, Dandan Zhao, Yoko Yoshimura, Masumi Saitoh, Masato Koyama (TMC) SDM2019-50 ICD2019-15 |
We demonstrated a cross-point memory array composed of Ag ionic memory cell with sub-μA and selectorless operation and 1... [more] | SDM2019-50 ICD2019-15 pp.85-88 |
| SDM | 2019-06-21 13:30 |
Aichi | Nagoya Univ. VBL3F | [Invited Lecture]
Necessity of 2D/3D nano metrology from the point of semiconductor devices Koji Usuda (Toshiba Memory Co.) SDM2019-29 |
[more] | SDM2019-29 p.21 |
| SDM | 2019-02-07 10:45 |
Tokyo | [Invited Talk]
Half pitch 14 nm direct pattering with Nanoimprint lithography Tetsuro Nakasugi (Toshiba Memory) SDM2018-91 |
(To be available after the conference date) [more] | SDM2018-91 pp.1-4 |
|
| SDM | 2019-01-29 14:50 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | [Invited Talk]
Half pitch 14 nm direct pattering with Nanoimprint lithography Tetsuro Nakasugi (Toshiba Memory Corp.) SDM2018-88 |
(To be available after the conference date) [more] | SDM2018-88 pp.31-34 |
| VLD, DC, CPSY, RECONF, CPM, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC (Joint) [detail] |
2018-12-07 14:10 |
Hiroshima | Satellite Campus Hiroshima | Process Variation-aware Model-based OPC using 0-1 Quadratic Programming Rina Azuma, Yukihide Kohira (Univ. of Aizu), Tomomi Matsui, Atsushi Takahashi (Tokyo Tech), Chikaaki Kodama, Shigeki Nojima (TMC) VLD2018-70 DC2018-56 |
Due to continuous shrinking of Critical Dimensions (CD) of layout pattern in VLSI, advances of manufacturing process in ... [more] | VLD2018-70 DC2018-56 pp.209-214 |
| SDM | 2018-11-08 13:30 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | [Invited Talk]
Device Simulation of Reliability for Advanced Semiconductor Devices Takamitsu Ishihara, Kazuya Matsuzawa, Takeshi Naito, Sadayuki Yoshitomi (TMC) SDM2018-67 |
[more] | SDM2018-67 pp.17-22 |
| PRMU, IBISML, IPSJ-CVIM [detail] | 2018-09-21 13:30 |
Fukuoka | Modification of Bayesian Optimization for Efficient Calibration of Simulation Model Daiki Kiribuchi, Takeichiro Nishikawa (Toshiba), Satoru Yokota, Ryota Narasaki, Soh Koike (Toshiba Memory) PRMU2018-63 IBISML2018-40 |
(To be available after the conference date) [more] | PRMU2018-63 IBISML2018-40 pp.195-200 |
|
| ICD | 2018-04-20 11:10 |
Tokyo | [Invited Talk]
A 512Gb 3b/Cell 3D Flash Memory on a 96-Word-Line-Layer Technology Hiroshi Maejima, Kazushige Kanda, Susumu Fujimura, Teruo Takagiwa, Susumu Ozawa, Jumpei Sato, Yoshihiko Shindo, Manabu Sato, Naoaki Kanagawa, Junji Musha, Satoshi Inoue, Katsuaki Sakurai, Toshifumi Hashimoto (TMC), Hao Nguyen, Ken Cheah, Hiroshi Sugawara, Seungpil Lee (WDC), Toshiki Hisada, Tetsuya Kaneko, Hiroshi Nakamura (TMC) ICD2018-10 |
A 512Gb 3b/cell flash has been developed on a 96-WL-layer BiCS FLASH technology. This work implements three key technolo... [more] | ICD2018-10 pp.39-44 |
|
| SDM | 2017-11-10 10:00 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | [Invited Talk]
SISPAD 2017 Review (2) Takashi Kurusu (TMC) SDM2017-67 |
[more] | SDM2017-67 pp.33-36 |
| VLD, DC, CPSY, RECONF, CPM, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC (Joint) [detail] |
2017-11-07 13:00 |
Kumamoto | Kumamoto-Kenminkouryukan Parea | [Invited Talk]
Innovative Applications of Machine Learning in Lithography and DFM Tetsuaki Matsunawa (Toshiba Memory) VLD2017-50 DC2017-56 |
[more] | VLD2017-50 DC2017-56 p.131 |
| SDM | 2017-10-26 09:30 |
Miyagi | Niche, Tohoku Univ. | [Invited Talk]
Utilization of Big Data for Innovation in Semiconductor Memory Manufacturing
-- Comprehensive Big-Data-Based Monitoring System for Yield Analysis in Semiconductor Manufacturing -- Hiroshi Akahori (Toshiba Memory), Kouta Nakata, Ryohei Orihara, Yoshiaki Mizuoka, Kentaro Takagi (Toshiba), Kenichi Kadota, Takaharu Nishimura, Yukako Tanaka, Hidetaka Eguchi (Toshiba Memory) SDM2017-55 |
In this work, we focus on yield analysis task where engineers identify the cause of failure from wafer failure map patte... [more] | SDM2017-55 pp.31-33 |
| ICD | 2011-04-18 13:30 |
Hyogo | Kobe University Takigawa Memorial Hall | [Invited Talk]
Technology Trend of NAND Flash Memories
-- A 151mm2 64Gb 2b/cell NAND Flash Memory in 24nm CMOS Technology -- Koichi Fukuda, Yoshihisa Watanabe, Eiichi Makino, Koichi Kawakami, Junpei Sato, Teruo Takagiwa, Naoaki Kanagawa, Hitoshi Shiga, Naoya Tokiwa, Yoshihiko Shindo, Toshiaki Edahiro, Takeshi Ogawa, Makoto Iwai (Toshiba), Kiyofumi Sakurai (Toshiba Memory Systems), Toru Miwa (SanDisk) ICD2011-4 |
A 64Gbit 2bit/cell NAND flash memory capable of 14MB/s programming and 266MB/s data transfer is fabricated in 24nm techn... [more] | ICD2011-4 pp.19-26 |
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