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Search Results: Conference Papers
 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 23件中 1~20件目  /  [Next]  
Committee Date Time Place Paper Title / Authors Abstract Paper #
VLD 2017-03-01
14:25
Okinawa Okinawa Seinen Kaikan A Nonvolatile Flip-Flop Circuit with a Split Store/Restore Architecture for Power Gating
Masaru Kudo, Kimiyoshi Usami (Shibaura Institute of Tech.)
This paper describes a nonvolatile Flip-Flop (NVFF) circuit to implement Nonvolatile Power Gating. We proposed a new NVF... [more] VLD2016-103
pp.7-12
HCGSYMPO
(2nd)
2016-12-07
- 2016-12-09
Kochi Kochi City Culture Plaza (CUL-PORT) Behavior Modification in Field-based Inspection Assistance using Mobile Devices for Infrastructure Asset Monitoring
Masafumi Nakagawa, Masaki Yamate, Tamaki Kobayashi, Liu Can, Shido Tanaka (Shibaura Institute of Tech.), Yasuaki Noda, Kazuyuki Hashimoto, Masaya Ito, Masahiro Miyo (Watanabe Eng.)
(To be available after the conference date) [more]
VLD, DC, CPSY, RECONF, CPM, ICD, IE
(Joint) [detail]
2016-11-29
09:00
Osaka Ritsumeikan University, Osaka Ibaraki Campus Design and Implementation Methodology of Low-power Standard cell memory with optimized body-bias separation in Silicon-on-Thin-BOX (SOTB)
Yusuke Yoshida, Kimiyoshi Usami (Shibaura Institute of Tech.)
We focus on the Standard Cell Memory (SCM) as another option to supersede SRAM for low-voltage operation. This paper des... [more] VLD2016-53 DC2016-47
pp.55-60
ICD, MW 2016-03-03
14:55
Hiroshima Hiroshima University Compact Harmonic Tuning Circuits for Class-F Amplifiers Using Negative Order Resonance Modes of CRLH Stub Lines
South Koizumi, Kengo Saito, Shinichi Tanaka (Shibaura Institute of Tech.)
Compact harmonic tuning circuits for class-F amplifier are realized using composite right-/left-handed transmission line... [more] MW2015-197 ICD2015-120
pp.135-140
VLD 2016-03-01
16:15
Okinawa Okinawa Seinen Kaikan Noise reduction effect for input dependence of Zigzag Power Gating
Tadahiro Kanamoto, Kimiyoshi Usami (Shibaura Institute of Tech.)
In Power Gating techniques to reduce leakage current, there is the technology called Zigzag Power Gating. Zigzag Power G... [more] VLD2015-128
pp.99-103
ICD, CPSY 2015-12-18
13:30
Kyoto Kyoto Institute of Technology Power optimization based on a simple power model for a micro-controller
Hayate Okuhara, Yu Fujita, Kuniaki Kitamori (Keio Univ.), Kimiyoshi Usami (Shibaura Institute of Tech.), Hideharu Amano (Keio Univ.)
 [more] ICD2015-88 CPSY2015-101
pp.93-98
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]
2015-12-02
16:20
Nagasaki Nagasaki Kinro Fukushi Kaikan Sleep Control Using Virtual Ground Voltage Detection For Fine-Grain Power Gating
Masaru Kudo, Kimiyoshi Usami (Shibaura Institute of Tech.)
This paper describes a sleep control technique using leakage monitor circuit to implement Fine-Grain Power Gating (FGPG)... [more] VLD2015-57 DC2015-53
pp.129-134
MW 2013-11-21
14:00
Kagoshima Kagoshima Prefectural Culture Center Application of Unbalanced Composite Right/Left-Handed Transmission Line to Compact High-Q Stub Resonators
Kyosuke Mukaida, Kei Takata, Kengo Saito, Shinichi Tanaka (Shibaura Institute of Tech.)
A composite right/left-handed transmission line stub resonator utilizing negative-order resonance mode as transmission z... [more] MW2013-137
pp.35-40
CPSY, VLD, RECONF, IPSJ-SLDM [detail] 2013-01-16
15:00
Kanagawa   Automatic generation of the Power-Switch Driver Circuit and evaluation in Power-gating design implementation
Makoto Miyauchi, Masaru Kudo, Kimiyoshi Usami (Shibaura Institute of Tech.)
 [more] VLD2012-116 CPSY2012-65 RECONF2012-70
pp.51-56
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]
2012-11-28
13:50
Fukuoka Centennial Hall Kyushu University School of Medicine Control of Fine-Grain Power Gating by Detecting of the Virtual Ground Voltage
Masaru Kudo, Kimiyoshi Usami (Shibaura Institute of Tech.)
This paper describes fine-grain control to power gate function units using the charge up phenomenon of the virtual groun... [more] VLD2012-98 DC2012-64
pp.225-230
VLD 2012-03-07
13:20
Oita B-con Plaza Power reduction of memory circuit and DVFS technique in Dynamic Reconfigurable Processor
Yuki Hayakawa, Kimiyoshi Usami (Shibaura Institute of Tech.)
This paper describes a DVFS technique to reduce energy dissipation of Dynamically Reconfigurable Processors(DRP). DRP’s ... [more] VLD2011-138
pp.109-114
VLD 2012-03-07
15:15
Oita B-con Plaza Power-Switch Drive-circuit generation for Ground-Bounce reduction using the Genetic-Programming
Makoto Miyauchi, Masaru Kudo, Yuya Ohta, Kimiyoshi Usami (Shibaura Institute of Tech.)
Ground Bounce noise is a serious problem Power Gating technology. In this research, as compared with the Daisy Chain whi... [more] VLD2011-142
pp.133-138
VLD 2012-03-07
16:05
Oita B-con Plaza Leakage Energy Reduction of Sub-Threshold Circuits by Body Bias Control for Power Switch
Ryo Mitsuhashi, Masaru Kudo, Yuya Ohta, Kimiyoshi Usami (Shibaura Institute of Tech.)
Power Gating (PG) is one of the technologies for reducing leakage energy. The effectiveness of leakage energy reduction ... [more] VLD2011-144
pp.145-150
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]
2011-11-30
11:20
Miyazaki NewWelCity Miyazaki Power-Gating Circuit Scheme for Transient-Glitch Energy Reduction
Yuya Ohta, Masaru Kudo, Kimiyoshi Usami (Shibaura Institute of Tech.)
In fine-grain power gating which performs cell-by-cell power gating (PG) , energy overhead consumed at sleep-in and slee... [more] VLD2011-90 DC2011-66
pp.221-226
AN, USN, SR, RCS
(Joint)
2010-10-29
11:00
Osaka Osaka University A Study on Installation, Operation and Wireless Multi-hop Backbone Performance Evaluation of NerveNet
Yasunori Owada, Masugi Inoue, Masaaki Ohnishi (NICT), Hiroaki Morino (Shibaura Shibaura Institute of Tech.), Tohru Sanefuji (NSC)
A new generation network should be an infrastructure that can provide a variety of context-awaere of services with the u... [more] AN2010-38
pp.85-90
VLD 2010-03-11
13:55
Okinawa   Implementation Scheme for Power Gating and its Influence to Energy Reduction
Yuya Ohta, Satoshi Koyama, Tatsunori Hashida, Tetsuya Muto, Tatsuya Yamamoto, Kimiyoshi Usami (Shibaura Institute of Tech.)
 [more] VLD2009-113
pp.85-90
AP, SAT
(Joint)
2008-07-24
09:55
Hokkaido Hokkaido University Approximate Maximum Likelihood Detection Algorithm for Multiple Antenna Systems
Wenjie Jiang, Yusuke Asai (NTT), Shuji Kubota (Shibaura Institute of Tech.)
In multiple antenna systems using spatial multiplexing to raise data rates, it is preferable to use maximum likelihood (... [more] AP2008-54
pp.105-110
CQ 2008-07-18
10:55
Hokkaido Kushiro Learning Center Practical QoE Model Considering Delay Condition and Content Preference
Masato Eguchi (NTTcom), Takumi Miyoshi (Shibaura Institute of Tech.), Kyoko Yamori (Asahi Univ.), Tatsuya Yamazaki (NICT)
In this paper, we conduct an empirical study to clarify the comprehensive QoE structure considering delay condition and ... [more] CQ2008-21
pp.43-48
HCS 2007-03-23
14:30
Aichi   Orthgnathic Surgical Simulation System by Integrating Entity Model Manipulation and 3D Image Display
Tatsunari Shimonagayoshi, Yoshimitsu Aoki (Shibaura Institute of Tech.)
In this study, a support system for orthodontic surgery to visualize the changes in the mandible and the occlusal condit... [more] HCS2006-62
pp.21-26
ICD, SDM 2005-08-18
14:30
Hokkaido HAKODATE KOKUSAI HOTEL Delay Modeling and Static Timing Analysis for MTCMOS Circuits
Naoaki Ohkubo, Kimiyoshi Usami (Shibaura Institute of Tech.)
One of the critical issues in MTCMOS design is how to estimate a circuit delay quickly. In this paper, we propose a dela... [more] SDM2005-138 ICD2005-77
pp.61-66
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