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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 20 of 20  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
R 2011-05-13
16:50
Kochi Kochi City Culture-Plaza Cul-Port Produce of Yield Analysis System at Semiconductor Manufacture Factory.
Shingo Himeno (Toshiba Oita Operations)
 [more]
ICD 2011-04-18
13:30
Hyogo Kobe University Takigawa Memorial Hall [Invited Talk] Technology Trend of NAND Flash Memories -- A 151mm2 64Gb 2b/cell NAND Flash Memory in 24nm CMOS Technology --
Koichi Fukuda, Yoshihisa Watanabe, Eiichi Makino, Koichi Kawakami, Junpei Sato, Teruo Takagiwa, Naoaki Kanagawa, Hitoshi Shiga, Naoya Tokiwa, Yoshihiko Shindo, Toshiaki Edahiro, Takeshi Ogawa, Makoto Iwai (Toshiba), Kiyofumi Sakurai (Toshiba Memory Systems), Toru Miwa (SanDisk) ICD2011-4
A 64Gbit 2bit/cell NAND flash memory capable of 14MB/s programming and 266MB/s data transfer is fabricated in 24nm techn... [more] ICD2011-4
pp.19-26
SDM 2011-02-07
12:40
Tokyo Kikai-Shinko-Kaikan Bldg. A highly reliable Cu interconnect with CuSiN and Ti-based barrier metal: Impact of oxgen surface treatment
Yumi Hayashi, Noriaki Matsunaga, Makoto Wada, Shinichi Nakao, Kei Watanabe, Satoshi Kato, Atsuko Sakata, Akihiro Kajita, Hideki Shibata (Toshiba Corp.) SDM2010-219
A trade-off property of CuSiN between EM improvement and line resistance increase was resolved by a breakthrough that le... [more] SDM2010-219
pp.19-23
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]
2010-12-01
13:15
Fukuoka Kyushu University [Invited Talk] Monolithic 3D-FPGA with TFT SRAM over 90nm 9 layer Cu CMOS
Tatasuya Naito, Tatsuya Ishida (Toshiba), Takeshi Onoduka (Covalent Materials), Masahito Nishigoori, Takeo Nakayama, Yoshihiro Ueno, Yasumi Ishimoto, Akihiro Suzuki, Chung Weicheng (Toshiba), Raminda Madurawe (readyASIC), Sheldon Wu (China International Intellectual Property Services), Shu Ikeda (tei Solutions), Hisato Oyamatsu (Toshiba) RECONF2010-50
 [more] RECONF2010-50
pp.65-69
ICD, SDM 2009-07-16
15:50
Tokyo Tokyo Institute of Technology The Study of Mobility-Tinv Trade-off in Deeply Scaled High-k/Metal Gate Devices and Scaling Design Guideline for 22nm-node Generation
Masakazu Goto, Shigeru Kawanaka, Seiji Inumiya, Naoki Kusunoki, Masumi Saitoh, Kosuke Tatsumura, Atsuhiro Kinoshita, Satoshi Inaba, Yoshiaki Toyoshima (Toshiba) SDM2009-107 ICD2009-23
The trade-off between Tinv scaling and carrier mobility () degradation in deeply scaled HK/MG nMOSFETs has been ... [more] SDM2009-107 ICD2009-23
pp.53-56
ED 2009-04-23
15:30
Miyagi Tohoku Univ. Ferroelectric-Gate Thin-Film-Transistor Memory Using Epitaxially Grown Composite-Oxide-Film
Yukihiro Kaneko, Hiroyuki Tanaka, Yoshihisa Kato, Yasuhiro Shimada (Panasonic Corp.) ED2009-5
We have developed a ferroelectric-gate thin-film transistor (FeTFT) composed of heteroepitaxially stacked oxide material... [more] ED2009-5
pp.17-22
ICD, ITE-IST 2008-10-23
11:10
Hokkaido Hokkaido University [Invited Talk] Analog/RF performance of scaled MOSFET -- Is scaled MOSFET friend for analog/RF circuits? --
Tatsuya Ohguro (Toshiba) ICD2008-74
High performance has been realized by gate length scaling of MOSFET. Recently, not only gate length scaling but also ag... [more] ICD2008-74
pp.89-94
SDM 2008-10-10
15:45
Miyagi Tohoku Univ. Influence of B and P dopants on SiO2 film characteristics
Satoshi Nagashima, Hiroshi Akahori (Toshiba) SDM2008-166
In general, the silicon material that has doped impurities such as phosphorus, boron, and arsenic to the diffusion and t... [more] SDM2008-166
pp.63-68
CPM, ICD 2008-01-18
14:55
Tokyo Kikai-Shinko-Kaikan Bldg Chip Thinning Technologies Realizing High Chip Strength
Shinya Takyu, Tetsuya Kurosawa, Noriko Shimizu, Susumu Harada (Toshiba Co.) CPM2007-145 ICD2007-156
Accompanying the rapid progress of the digital network information society, there is strong demand for high functionalit... [more] CPM2007-145 ICD2007-156
pp.99-103
ED 2007-11-28
11:35
Miyagi Tohoku Univ. Research Institute of Electrical Communication High power sub-terahertz electromagnetic wave radiation from GaN Photoconductive switch
Osamu Imafuji, Brahm Pal Singh, Yutaka Hirose, Yasuyuki Fukushima, Shinichi Takigawa (Matsushita) ED2007-201
We present apparently the first observation of sub-terahertz electromagnetic wave emission from GaN based large aperture... [more] ED2007-201
pp.77-81
ICD, SDM 2007-08-24
14:50
Hokkaido Kitami Institute of Technology 0.7 V SRAM Technology with Stress-Enhanced Dopant Segregated Schottky (DSS) Source/Drain Transistors for 32 nm Node
Hiroyuki Onoda, Katsura Miyashita, Takeo Nakayama, Tomoko Kinoshita, Hisashi Nishimura, Atsushi Azuma, Seiji Yamada, Fumitomo Matsuoka (Toshiba) SDM2007-165 ICD2007-93
For the fist time, low supply voltage SRAM operation with stress-enhanced dopant segregated Schottky (DSS) source/drain ... [more] SDM2007-165 ICD2007-93
pp.131-134
MW, ED 2007-01-19
15:50
Tokyo Kikai-Shinko-Kaikan Bldg. High Voltage and High Frequency( over10MHz) Class-E Power-Supplies Using a GaN-HEMT
Wataru Saito (Toshiba Semiconductor), Tomokazu Domon, Kunio Tsuda (Toshiba R & D Center), Ichiro Omura (Toshiba Semiconductor)
GaN-HEMTs can realize high-voltage and ultra-low on-resistance due to high critical electric field and high electron mob... [more] ED2006-237 MW2006-190
pp.205-208
ICD, ITE-CE 2006-12-14
11:15
Hiroshima   A Fast fc Automatic Tuning Cicuit with Wide Tuning Range for WCDMA Direct Conversion Receiver Systems
Osamu Watanabe, Rui Ito, Shigehito Saigusa, Tadashi Arai, Tetsuro Itakura (Toshiba)
 [more] ICD2006-148
pp.31-35
ICD, ITE-CE 2006-12-14
11:40
Hiroshima   A Quadrature Demodulator for WCDMA Receiver Using Common-Base Input Stage with Robustness to Transmitter Leakag
Toshiya Mitomo, Osamu Watanabe, Ryuichi Fujimoto, Shunji Kawaguchi (Toshiba)
 [more] ICD2006-149
pp.37-42
ICD, SDM 2006-08-18
11:40
Hokkaido Hokkaido University Embedded Bulk FinFET SRAM Cell Technology with Planar FET Peripheral Circuit for hp32 nm node and beyond
Hirohisa Kawasaki (TAEC), Satoshi Inaba, Kimitoshi Okano, Akio Kaneko (Toshiba Semicon.), Atsushi Yagishita (TAEC), Takashi Izumida, Takahisa Kanemura, Takahiko Sasaki, Nobuaki Otsuka, Nobutoshi Aoki, Kyoichi Suguro, Kazuhiro Eguchi, Yoshitaka Tsunashima (Toshiba Semicon.), Kazunari Ishimaru (TAEC), Hidemi Ishiuchi (Toshiba Semicon.)
 [more] SDM2006-147 ICD2006-101
pp.127-132
SDM 2006-06-22
10:55
Hiroshima Faculty Club, Hiroshima Univ. Realization of SiON films with small ΔVfb
Daisuke Matsushita, Koichi Muraoka, Yasushi Nakasaki, Koichi Kato, Shoko Kikuchi, Kiwamu Sakuma, Yuichiro Mitani (toshiba R&D center), Mariko Takayanagi, Kazuhiro Eguchi (Semiconductor Company)
 [more] SDM2006-56
pp.81-86
ICD, CPM 2005-09-09
10:55
Tokyo Kikai-Shinko-Kaikan Bldg. Lead-free bumping and its process integrity for fine pitch interconnects
Hirokazu Ezawa, Masaharu Seto, Kazuhito Higuchi (Toshiba)
Electroplated solder bumps allow much finer pitch interconnection for high I/O applications, although controlling the al... [more] CPM2005-99 ICD2005-109
pp.17-22
ICD, SDM 2005-08-19
10:45
Hokkaido HAKODATE KOKUSAI HOTEL HfSiON Gate Dielectrics Design for Mixed Signal CMOS
Kenji Kojima, Ryosuke Iijima, Tatsuya Ohguro, Takeshi Watanabe, Mariko Takayanagi, Hisayo S. Momose, Kazunari Ishimaru, Hidemi Ishiuchi (TOSHIBA)
(Advance abstract in Japanese is available) [more] SDM2005-147 ICD2005-86
pp.25-30
ICD, SDM 2005-08-19
14:40
Hokkaido HAKODATE KOKUSAI HOTEL Robust Device Design in FinFET SRAM for hp22nm Technology Node
Kimitoshi Okano, Tatsuya Ishida, Takahiko Sasaki, Takashi Izumida, Masaki Kondo, Makoto Fujiwara, Nobutoshi Aoki, Satoshi Inaba, Nobuaki Otsuka, Kazunari Ishimaru, Hidemi Ishiuchi (Toshiba)
Feasibility of FinFET SRAM operation at hp22nm technology node has been studied by device and circuit simulation from th... [more] SDM2005-154 ICD2005-93
pp.67-72
ICD 2005-04-14
11:40
Fukuoka   A 128Mb DRAM Using a 1T Gain Cell(FBC) on SOI
Takashi Ohsawa, Katsuyuki Fujita, Kosuke Hatsuda (Toshiba), Tomoki Higashi (Toshiba Microelectronics), Mutsuo Morikado, Yoshihiro Minami, Tomoaki Shino, Hiroomi Nakajima, Kazumi Inoh, Takeshi Hamamoto, Shigeyoshi Watanabe (Toshiba)
We report on a 128Mbit DRAM design using the capacitor-less DRAM cell or the floating body cell(FBC) on SOI. The cell of... [more] ICD2005-5
pp.23-28
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