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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 20 of 21  /  [Next]  
Committee Date Time Place Paper Title / Authors Abstract Paper #
SDM 2020-02-07
09:35
Tokyo Tokyo University-Hongo [Invited Talk] Impact of Homogeneously Dispersed Al Nanoclusters by Si-monolayer Insertion into Hf0.5Zr0.5O2 Film on FeFET Memory Array with Tight Threshold Voltage Distribution
Tadashi Yamaguchi, Keiichi Maekawa, Takahiro Ohara, Atsushi Amo, Eiji Tsukuda, Kenichiro Sonoda, Hiroshi Yanagita, Masao Inoue, Masazumi Matsuura, Tomohiro Yamashita (Renesas) SDM2019-89
 [more] SDM2019-89
pp.5-8
SDM, ICD, ITE-IST [detail] 2019-08-09
10:50
Hokkaido Hokkaido Univ., Graduate School /Faculty of Information Science and [Invited Talk] A 28nm 600MHz Automotive Flash Microcontroller with Virtualization-Assisted Processor for Next-Generation Automotive Architecture supporting ISO26262 ASIL-D
Naoto Okumura, Sugako Otani, Norimasa Otsuki, Yasufumi Suzuki, Shohei Maeda, Tomonori Yanagita, Takao Koike, Masao Ito, Minoru Uemura, Yasuhisa Shimazaki, Toshihiro Hattori, Noriaki Sakamoto, Hiroyuki Kondo (Renesas Electronics Corp.) SDM2019-47 ICD2019-12
Along with the rapid progress of automotive Electrical/Electronic(E/E) architecture, further integration of multiple ele... [more] SDM2019-47 ICD2019-12
pp.67-71
SDM 2019-01-29
13:20
Tokyo Kikai-Shinko-Kaikan Bldg. [Invited Talk] Highly Reliable Ferroelectric Hf0.5Zr0.5O2 Film with Al Nanoclusters Embedded by Sub-Monolayer Doping Technique
Tadashi Yamaguchi, Tiantian Zhang, Kazuyuki Omori, Yasuhiro Shimada, Yorinobu Kunimune, Takashi Ide, Masao Inoue, Masazumi Matsuura (Renesas) SDM2018-86
Highly reliable ferroelectric (FE) Hf0.5Zr0.5O2 (HZO) film with Al nanoclusters embedded by sub-monolayer doping techniq... [more] SDM2018-86
pp.21-26
SDM, ICD, ITE-IST [detail] 2018-08-09
12:45
Hokkaido Hokkaido Univ., Graduate School of IST M Bldg., M151 Study of Impact of BTI's Local Layout Effect Including Recovery Effect on Various Standard-Cells in 10nm FinFET
Mitsuhiko Igarashi, Yuuki Uchida, Yoshio Takazawa, Yasumasa Tsukamoto, Koji Shibutani, Koji Nii (Renesas) SDM2018-47 ICD2018-34
 [more] SDM2018-47 ICD2018-34
pp.109-113
SDM 2016-10-26
15:30
Miyagi Niche, Tohoku Univ. [Invited Talk] Back-Bias Control Technique for Suppression of Die-to-Die Delay Variability of SOTB CMOS Circuits at Ultralow-Voltage (0.4 V) Operation
Hideki Makiyama, Yoshiki Yamamoto, Takumi Hasegawa, Shinobu Okanishi, Keiichi Maekawa, Hiroki Shinkawata, Shiro Kamohara, Yasuo Yamaguchi (Renesas Electronics Corp.), Nobuyuki Sugii (Hitach), Koichiro Ishibashi (The Univ. of Electro-Communications), Tomoko Mizutani, Toshiro Hiramoto (The Univ. of Tokyo) SDM2016-71
Small-variability transistors such as silicon on thin buried oxide (SOTB) are effective for reducing the operation volta... [more] SDM2016-71
pp.15-20
SDM 2015-11-05
14:30
Tokyo Kikai-Shinko-Kaikan Bldg. [Invited Talk] Review of SISPAD2015
Tatsuya Kunikiyo (Renesas) SDM2015-88
2015 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD 2015) was held on September 9... [more] SDM2015-88
pp.23-27
SDM, ICD 2015-08-25
10:55
Kumamoto Kumamoto City [Invited Talk] Novel Single p+Poly-Si/Hf/SiON Gate Stack Technology on Silicon-on-Thin-Buried-Oxide (SOTB) for Ultra-Low Leakage Applications
Yoshiki Yamamoto, Hideki Makiyama, Tomohiro Yamashita, Hidekazu Oda, Shiro Kamohara, Yasuo Yamaguchi (Renesas Electronics Corp.), Nobuyuki Sugii (Hitachi), Tomoko Mizutani, Masaharu Kobayashi, Toshiro Hiramoto (UT) SDM2015-67 ICD2015-36
We demonstrate a cost effective 65-nm SOTB CMOS technology for ultra-low leakage applications. Novel single p+poly-Si/Hf... [more] SDM2015-67 ICD2015-36
pp.53-57
ICD, SDM 2014-08-04
11:15
Hokkaido Hokkaido Univ., Multimedia Education Bldg. Testability Improvement for 12.8 GB/s Wide IO DRAM Controller with Small Area Prebonding TSV test and 1GHz Sampled Fully Digital Noise Monitor
Takao Nomura, Ryo Mori, Koji Takayanagi, Toshihiko Ochiai, Kazuki Fukuoka, Tsuyoshi Kida, Koji Nii, Sadayuki Morita (REL) SDM2014-65 ICD2014-34
We developed a Wide IO DRAM controller chip with Through Silicon Via (TSV) technology. Test circuitry is embedded in the... [more] SDM2014-65 ICD2014-34
pp.17-21
SDM 2014-02-28
10:10
Tokyo Kikai-Shinko-Kaikan Bldg. [Invited Talk] Trend of practical technology in advanced low-k integration
Naoya Inoue (Renesas Electronics Corp.) SDM2013-166
Looking at the trend in Cu/Low-k interconnect technology, integration issues and solutions are discussed from the viewpo... [more] SDM2013-166
pp.7-12
SDM, ICD 2013-08-02
15:10
Ishikawa Kanazawa University [Invited Talk] A single chip LTE capable communication processor R-Mobile U2 and its technologies in power management -- Clock control method by the power saver --
Masaki Fujigaya, Noriaki Sakamoto, Takao Koike, Takahiro Irita, Kohei Wakahara, Tsugio Matsuyama, Keiji Hasegawa, Toshiharu Saito, Akira Fukuda, Kaname Teranishi (Renesas Mobile Corp.), Kazuki Fukuoka, Noriaki Maeda, Koji Nii (Renesas Electronics Corp.), Takeshi Kataoka, Toshihiro Hattori (Renesas Mobile Corp.) SDM2013-84 ICD2013-66
The “R-Mobile U2” is a single chip integration of LTE capable base band and 1.5 GHz dual-core application processor. In ... [more] SDM2013-84 ICD2013-66
pp.99-103
ICD 2013-04-11
16:20
Ibaraki Advanced Industrial Science and Technology (AIST) Highly Reliable Logic Primitive Gates for Spintronics-Based Logic LSI
Yukihide Tsuji, Ryusuke Nebashi, Noboru Sakimura, Ayuka Morioka, Hiroaki Honjo, Keiichi Tokutome, Sadahiko Miura (NEC), Tetsuhiro Suzuki (Renesas Electronics Corp.), Shunsuke Fukami, Keizo Kinoshita, Takahiro Hanyu, Tetsuo Endoh, Naoki Kasai, Hideo Ohno (Tohoku Univ.), Tadahiko Sugibayashi (NEC) ICD2013-9
Implementing redundancy within a Spintronis Primitive Gata (SPG) using multi-terminal DWM cells ensures high reliability... [more] ICD2013-9
pp.41-46
MW 2013-03-08
09:50
Hiroshima Hiroshima Univ. A ΔΣ-Modulator-Less Digitally-Controlled Oscillator using Fractional Capacitors for Cellular Transmitter
Takahiro Nakamura (Hitachi), Takayasu Norimatsu (Renesas Mobile), Toshiya Uozumi, Keisuke Ueda (Renesas), Taizo Yamawaki (Renesas Mobile) MW2012-182
 [more] MW2012-182
pp.129-133
ICD 2012-04-24
15:40
Iwate Seion-so, Tsunagi Hot Spring (Iwate) A Chip-ID Generating Circuit for Dependable LSI using Random Address Errors on Embedded SRAM and On-Chip Memory BIST
Hidehiro Fujiwara, Makoto Yabuuchi, Hirofumi Nakano, Hiroyuki Kawai, Koji Nii, Kazutami Arimoto (Renesas Electronics) ICD2012-17
 [more] ICD2012-17
pp.91-95
CAS 2012-01-20
12:25
Fukuoka Kyushu Univ. [Invited Talk] Technical Trend of Digitally Assisted A/D Converters
Tatsuji Matsuura (Renesas) CAS2011-104
Abstract In spite of the numerous merits of advanced fine CMOS process/devices, when designing high performance ADCs, t... [more] CAS2011-104
pp.103-108
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]
2011-11-30
10:30
Miyazaki NewWelCity Miyazaki Immunity Evaluation of SRAM Core Using DPI with On-Chip Diagnosis Structures
Takuya Sawada, Taku Toshikawa, Kumpei Yoshikawa (Kobe Univ.), Hidehiro Takata, Koji Nii (Renesas Electronics Corp.), Makoto Nagata (Kobe Univ.) CPM2011-165 ICD2011-97
 [more] CPM2011-165 ICD2011-97
pp.85-90
SDM 2011-02-07
10:50
Tokyo Kikai-Shinko-Kaikan Bldg. Path-finding for Integration of Robust Low-k (k-2.5) SiOCH in System LSI
Naoya Inoue, Makoto Ueki, Hironori Yamamoto, Ippei Kume, Jun Kawahara, Manabu Iguchi, Hirokazu Honda, Yoshitaka Horikoshi, Yoshihiro Hayashi (Renesas Electronics Corp.) SDM2010-217
Impacts of k-value reduction on LSI performances are clarified quantitatively using 2M-gate net-list. Reduction in k-val... [more] SDM2010-217
pp.7-12
ICD 2010-12-16
13:00
Tokyo RCAST, Univ. of Tokyo [Invited Talk] Measurement and Characteristics Validation of On-chip Signal and Power Noise -- Looking back on my doctoral course --
Yasuhiro Ogasahara (Renesas Electronics Corp.) ICD2010-98
This paper describes measurement results of inductive coupling effect on timing, and validation of interconnect model. T... [more] ICD2010-98
pp.19-24
ICD
(Workshop)
2010-08-16
- 2010-08-18
Overseas Ho Chi Minh City University of Technology A Multi-Color Space Conversion for Video Input Output Engine
Hai Vu Nguyen, Thang Minh Le (RVC), Toyokazu Hori (REL)
A Mutli-Color Space Conversion (CSC) in Video Input/ Output engine supports different conversion standards by only one l... [more]
ICD
(Workshop)
2010-08-16
- 2010-08-18
Overseas Ho Chi Minh City University of Technology Designing an Interrupt Controller for a Multi-core System
Liem Tan Pham, Huong Thien Hoang, Phong The Vo, Y Thien Vo (RVC), Masayuki Ito (REL)
Enhancing design efficiency and overall system performance are important targets and design challenges for a multicore s... [more]
ICD
(Workshop)
2010-08-16
- 2010-08-18
Overseas Ho Chi Minh City University of Technology Toward a High-Performance & Low-Power Application Processor for Portable Navigation Devices
Khoa Dac Tran, Hoa Tan Lu, Cuong Phuc Phan, Quang Hai Phan (RVC), Hiroyuki Kudo, Seiichi Negishi, Mitsuyoshi Yamamoto, Yasushi Okamoto (REL)
We have developed SH7723, an application processor for PND (portable navigation devices). SH7723 introduces a 720-MIPS S... [more]
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