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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 20 of 26  /  [Next]  
Committee Date Time Place Paper Title / Authors Abstract Paper #
MSS, CAS, SIP, VLD 2019-07-31
11:00
Iwate Iwate Univ. [Invited Talk] The efficiency and performance of compact deep learning methods
Atsunori Kanemura (LeapMind) CAS2019-15 VLD2019-21 SIP2019-31 MSS2019-15
 [more] CAS2019-15 VLD2019-21 SIP2019-31 MSS2019-15
p.65
RECONF 2017-09-25
16:30
Tokyo DWANGO Co., Ltd. [Invited Talk] Scalable and convertible FPGA DNN accelerator
Shinichi Suto, Takato Yamada (LeapMind) RECONF2017-30
 [more] RECONF2017-30
pp.47-49
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]
2015-12-02
17:10
Nagasaki Nagasaki Kinro Fukushi Kaikan The adaptive body bias generator for achieving the ultra-low power operation of the logic circuit
Tomoaki Koide, Kouichirou Ishibashi (UEC), Nobuyuki Sugi (LEAP) CPM2015-134 ICD2015-59
The leakage has been increasing by miniaturization of the transistor in recently year. Adaptive body bias generator with... [more] CPM2015-134 ICD2015-59
pp.39-43
ICD 2015-04-17
10:00
Nagano   [Invited Talk] GexTe1-x/Sb2Te3 Topological switching random access memory (TRAM)
Norikatsu Takaura (LEAP) ICD2015-8
 [more] ICD2015-8
pp.33-37
SDM 2015-03-02
13:05
Tokyo Kikai-Shinko-Kaikan Bldg [Invited Talk] Area dependence of thermal stability factor in perpendicular STT-MRAM analized by bi-directional data flipping model
Koji Tsunoda, Masaki Aoki, Hideyuki Noshiro, Yoshihisa Iba, Chikako Yoshida, Yuuichi Yamazaki, Atsushi Takahashi, Akiyoshi Hatada, Masaaki Nakabayashi, Toshihiro Sugii (LEAP) SDM2014-166
We report a statistical analysis of the thermal stability factor (delta) for the top-pinned perpendicular magnetic tunne... [more] SDM2014-166
pp.23-28
SDM 2015-03-02
13:35
Tokyo Kikai-Shinko-Kaikan Bldg [Invited Talk] CNT Via Integration with Highly Dense and Selective CNT Growth
Atsunobu Isobayashi, Makoto Wada, Ban Ito, Tatsuro Saito, Daisuke Nishide, T. Ishikura, Masayuki Katagiri, Yuichi Yamazaki, Takashi Matsumoto, Masayuki Kitamura, Masahito Watanabe, Naoshi Sakuma, Akihiro Kajita, Tadashi Sakai (LEAP) SDM2014-167
In this study, a highly selective carbon nanotube (CNT) via process was developed using a sacrificial spin-on carbon (SO... [more] SDM2014-167
pp.29-32
SDM 2014-10-17
14:30
Miyagi Niche, Tohoku Univ. [Invited Talk] Back-Bias Control technique for Suppression of Die-to-Die Delay Variability of SOTB MOS Circuits at Ultralow-Voltage (0.4 V) Operation
Hideki Makiyama, Yoshiki Yamamoto, Hidekazu Oda, Shiro Kamohara, Nobuyuki Sugii, Yasuo Yamaguchi (LEAP), Koichiro Ishibashi (Univ. of Electro-Communications), Tomoko Mizutani, Toshiro Hiramoto (Univ. of Tokyo) SDM2014-94
Small-variability transistors such as silicon on thin buried oxide (SOTB) are effective for reducing the operation volta... [more] SDM2014-94
pp.61-68
ICD, SDM 2014-08-04
09:00
Hokkaido Hokkaido Univ., Multimedia Education Bldg. [Invited Talk] A Perpetuum Mobile 32bit CPU with 13.4pJ/cycle, 0.14μA Sleep Current using Reverse-Body-Bias Assisted 65nm SOTB CMOS Technology
Koichiro Ishibashi (UEC), Nobuyuki Sugii (LEAP), Kimiyoshi Usami (SIT), Hideharu Amano (KU), Kazutoshi Kobayashi (KIT), Cong-Kha Pham (UEC), Hideki Makiyama, Yoshiki Yamamoto, Hirofumi Shinohara, Toshiaki Iwamatsu, Yasuo Yamaguchi, Hidekazu Oda, Takumi Hasegawa, Shinobu Okanishi, Hiroshi Yanagita (LEAP) SDM2014-62 ICD2014-31
 [more] SDM2014-62 ICD2014-31
pp.1-4
ICD, SDM 2014-08-04
13:55
Hokkaido Hokkaido Univ., Multimedia Education Bldg. [Invited Talk] STT-MRAM Development for Embedded Cache Memory
Toshihiro Sugii, Yoshihisa Iba, Masaki Aoki, Hideyuki Noshiro, Koji Tsunoda, Akiyoshi Hatada, Masaaki Nakabayashi, Yuuichi Yamazaki, Atsushi Takahashi, Chikako Yoshida (LEAP) SDM2014-68 ICD2014-37
We report the current status of our development of spin-transfer torque magnetic RAMs (STT-MRAMs) and their integration ... [more] SDM2014-68 ICD2014-37
pp.35-38
ICD, SDM 2014-08-05
09:50
Hokkaido Hokkaido Univ., Multimedia Education Bldg. Statistical Analysis of Minimum Operation Voltage (Vmin) in Fully Depleted Silicon-on-Thin-BOX (SOTB) SRAM Cells
Tomoko Mizutani (Univ. of Tokyo), Yoshiki Yamamoto, Hideki Makiyama, Tomohiro Yamashita, Hidekazu Oda, Shiro Kamohara, Nobuyuki Sugii (LEAP), Toshiro Hiramoto (Univ. of Tokyo) SDM2014-72 ICD2014-41
The minimum operation voltage (Vmin) of fully depleted (FD) silicon-on-thin-BOX (SOTB) SRAM cells are measured and stati... [more] SDM2014-72 ICD2014-41
pp.55-58
ICD 2014-04-18
09:30
Tokyo Kikai-Shinko-Kaikan Bldg. A 0.38-V Operating STT-MRAM with Process Variation Tolerant Sense Amplifier
Yohei Umeki, Koji Yanagida, Shusuke Yoshimoto, Shintaro Izumi, Masahiko Yoshimoto, Hiroshi Kawaguchi (Kobe Univ.), Koji Tsunoda, Toshihiro Sugii (LEAP) ICD2014-10
This paper exhibits a 65-nm 8-Mb spin transfer torque magnetoresistance random access memory (STT-MRAM) operating at a s... [more] ICD2014-10
pp.47-51
ICD 2014-04-18
09:55
Tokyo Kikai-Shinko-Kaikan Bldg. [Invited Lecture] Ultralow-Voltage Operation of Silicon-on-Thin-BOX (SOTB) 2Mbit SRAM Down to 0.37 V Utilizing Adaptive Back Bias
Yoshiki Yamamoto, Hideki Makiyama, Tomohiro Yamashita, Hidekazu Oda, Shiro Kamohara, Nobuyuki Sugii, Yasuo Yamaguchi (LEAP), Tomoko Mizutani, Toshiro Hiramoto (UTokyo) ICD2014-11
We demonstrated record 0.37V minimum operation voltage (VMIN) of 2Mb Silicon-on-Thin-Buried-oxide (SOTB) 6T-SRAM. Thanks... [more] ICD2014-11
pp.53-57
SDM 2014-01-29
14:40
Tokyo Kikai-Shinko-Kaikan Bldg. [Invited Talk] Suppression of Die-to-Die Delay Variability of Silicon on Thin Buried Oxide (SOTB) CMOS Circuits by Balanced P/N Drivability Control with Back-Bias for Ultralow-Voltage (0.4 V) Operation
Hideki Makiyama, Yoshiki Yamamoto, Hirofumi Shinohara, Toshiaki Iwamatsu, Hidekazu Oda, Nobuyuki Sugii (LEAP), Koichiro Ishibashi (Univ. of Electro- Comm.), Tomoko Mizutani, Toshiro Hiramoto (Univ. of Tokyo), Yasuo Yamaguchi (LEAP) SDM2013-143
Small-variability transistors such as silicon on thin buried oxide (SOTB) are effective for reducing the operation volta... [more] SDM2013-143
pp.35-38
ICD 2014-01-28
15:00
Kyoto Kyoto Univ. Tokeidai Kinenkan [Poster Presentation] STT-MRAM Architecture for Improving Throughput
Haruki Mori, Koji Yanagida, Yohei Umeki, Shusuke Yoshimoto, Shintaro Izumi, Masahiko Yoshimoto, Hiroshi Kawaguchi (Kobe Univ.), Koji Tsunoda, Toshihiro Sugii (LEAP) ICD2013-110
STT-MRAM (Spin Torque Transfer Magnetic Random Access Memory) attracts an attention as the substitute memory of SRAM. Th... [more] ICD2013-110
p.27
SDM, ICD 2013-08-02
09:25
Ishikawa Kanazawa University Reduced Cell Current Variability in Fully Depleted Silicon-on-Thin-BOX (SOTB) SRAM Cells at Supply Voltage of 0.4V
Tomoko Mizutani (Univ. of Tokyo), Yoshiki Yamamoto, Hideki Makiyama, Hirofumi Shinohara, Toshiaki Iwamatsu, Hidekazu Oda, Nobuyuki Sugii (LEAP), Toshiro Hiramoto (Univ. of Tokyo) SDM2013-75 ICD2013-57
Cell current (ICELL) variability in 6T-SRAM composed of silicon-on-thin-BOX (SOTB) MOSFETs by 65nm technology is measure... [more] SDM2013-75 ICD2013-57
pp.47-52
ICD 2013-04-11
09:00
Ibaraki Advanced Industrial Science and Technology (AIST) [Invited Talk] A Low Power Phase Change Memory Using Low Thermal Conductive Material with Nano-Crystalline Structure
Takahiro Morikawa, Ken'ichi Akita, Takasumi Ohyanagi, Masahito Kitamura, Masaharu Kinoshita, Mitsuharu Tai, Norikatsu Takaura (LEAP) ICD2013-1
 [more] ICD2013-1
pp.1-4
ICD 2013-04-11
09:50
Ibaraki Advanced Industrial Science and Technology (AIST) [Invited Talk] A Novel MTJ for STT-MRAM with a Dummy Free Layer and Dual Tunnel Junctions
Koji Tsunoda, Hideyuki Noshiro, Chikako Yoshida, Yuuichi Yamazaki, Atsushi Takahashi, Yoshihisa Iba, Akiyoshi Hatada, Masaaki Nakabayashi, Takashi Takenaga, Masaki Aoki, Toshihiro Sugii (LEAP) ICD2013-2
A novel magnetic tunnel junction (MTJ) for embedded memory applications such as spin transfer torque magneto-resistive r... [more] ICD2013-2
pp.5-10
ICD 2013-04-12
08:30
Ibaraki Advanced Industrial Science and Technology (AIST) [Invited Talk] Complementary atom-switch based programmable cell array and its demostraion of logic mapping synthesized from RTL code
Makoto Miyamura, Munehiro Tada, Toshitsugu Sakamoto, Naoki Banno, Koichiro Okamoto, Noriyuki Iguchi, Hiromitsu Hada (LEAP) ICD2013-12
Reconfigurable nonvolatile programmable-logic using complementary atom switch (CAS) is successfully demonstrated on a 65... [more] ICD2013-12
pp.55-59
SDM 2013-02-04
13:10
Tokyo Kikai-Shinko-Kaikan Bldg. Smart interconnect technology using atom switch for low-power programmable Logic
Munehiro Tada, Toshitsugu Sakamoto, Makoto Miyamura, Naoki Banno, Koichiro Okamoto, Noriyuki Iguchi, Hiromitsu Hada (LEAP) SDM2012-152
Multi-level interconnect technology in ULSI is now facing the difficulty of the scaling limit. “BEOL devices” having a n... [more] SDM2012-152
pp.9-14
ICD, SDM 2012-08-02
13:00
Hokkaido Sapporo Center for Gender Equality, Sapporo, Hokkaido [Invited Lecture] Silicon on Thin Buried Oxide (SOTB) Technology for Ultralow-Power (ULP) Applications
Nobuyuki Sugii, Toshiaki Iwamatsu, Yoshiki Yamamoto, Hideki Makiyama, Takaaki Tsunomura, Hirofumi Shinohara, Hideki Aono, Hidekazu Oda, Shiro Kamohara, Yasuo Yamaguchi (LEAP/Renesas), Tomoko Mizutani, Toshiro Hiramoto (IIS, The University of Tokyo) SDM2012-68 ICD2012-36
Needs for low-power CMOS devices are still increasing. Ultralow-voltage-operation (ULV) CMOS with maximum power efficien... [more] SDM2012-68 ICD2012-36
pp.29-32
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