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All Technical Committee Conferences (Searched in: All Years)
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Search Results: Conference Papers |
Conference Papers (Available on Advance Programs) (Sort by: Date Descending) |
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Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
RCC, ASN, RCS, NS, SR (Joint) |
2015-07-31 09:00 |
Nagano |
JA Naganoken Bldg. |
A sensor-based visualizable auscultatory blood pressure measurement learning support tool Chooi-Ling Goh (Design Algorithm Laboratory), Shigetoshi Nakatake (Univ. of Kitakyushu) ASN2015-51 |
In order to help the healthcare practitioners to master the skill of measuring blood pressure by auscultatory method mor... [more] |
ASN2015-51 pp.177-182 |
IE, ICD, VLD, IPSJ-SLDM [detail] |
2013-10-08 11:25 |
Aomori |
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A Delay-Locked Loop with Multi-Level Channel Length Decomposed Programming Delay Elements Yu Zhang, Mingyu Li, Qing Dong, Shigetoshi Nakatake (Univ. of Kitakyushu), Bo Yang (Design Algorithm Lab) VLD2013-59 ICD2013-83 IE2013-59 |
Variable delay elements are often used in various types
of high-speed integrated circuits,
mainly intended for delay c... [more] |
VLD2013-59 ICD2013-83 IE2013-59 pp.71-76 |
IE, ICD, VLD, IPSJ-SLDM [detail] |
2013-10-08 11:50 |
Aomori |
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A 9-bit, 20MS/s SAR ADC with A Design Strategy by Synthesizing Consideration of Layout-Dependent Effects Gong Chen, Mingyu Li, Qing Dong, Shigetoshi Nakatake (Univ. of Kitakyushu), Bo Yang (Design Algorithm Lab) VLD2013-60 ICD2013-84 IE2013-60 |
In nano-scale manufacturing processes of integrated circuits,
a impact of layout-dependent effects (LDEs)
to circuit p... [more] |
VLD2013-60 ICD2013-84 IE2013-60 pp.77-82 |
IE, SIP, ICD, VLD, IPSJ-SLDM [detail] |
2012-10-19 10:15 |
Iwate |
Hotel Ruiz |
A 9-bit 10MSps SAR ADC with Double Input Range for Supply Voltage Gong Chen, Yu Zhang, Qing Dong, Shigetoshi Nakatake (Univ. of Kitakyushu), Bo Yang, Jing Li (Design Algorithm Lab.) VLD2012-49 SIP2012-71 ICD2012-66 IE2012-73 |
This paper presents a pre-charge VCM-based method for 1.2V 9-bit 10MSps Successive Approximation
Register (SAR) ADC. Th... [more] |
VLD2012-49 SIP2012-71 ICD2012-66 IE2012-73 pp.49-53 |
IE, SIP, ICD, VLD, IPSJ-SLDM [detail] |
2012-10-19 14:30 |
Iwate |
Hotel Ruiz |
CMOS Op-amp Circuit Synthesis with Geometric Programming Yu Zhang, Qing Dong, Shigetoshi Nakatake (Univ. of Kitakyushu), Bo Yang, Jing Li (Design Algorithm Lab.) VLD2012-54 SIP2012-76 ICD2012-71 IE2012-78 |
This work presents a 6T SRAM design in nanometer process via geometric programming (GP). We adopt the transistor array (... [more] |
VLD2012-54 SIP2012-76 ICD2012-71 IE2012-78 pp.77-82 |
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