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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
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Committee Date Time Place Paper Title / Authors Abstract Paper #
SDM 2016-01-22
14:35		 Tokyo Sanjo Conference Hall, The University of Tokyo [Invited Talk] Effect of Wafer Thinning on DRAM Characteristics for Bumpless Interconnects and WOW Applications
Y. S. Kim, S. Kodama, Y. Mizushima, T. Nakamura, N. Maeda, K. Fujimoto (Tokodai), A. Kawai (DISCO), T. Ohba (Tokodai) SDM2015-116		 (To be available after the conference date) [more] SDM2015-116
pp.33-37
SDM 2014-02-28
11:00		 Tokyo Kikai-Shinko-Kaikan Bldg. [Invited Talk] Impact of Back Grind Damage on Si Wafer Thinning for 3D Integration
Yoriko Mizushima (Fujitsu Lab./Tokyo Inst. of Tech.), Youngsuk Kim (Tokyo Inst. of Tech./Disco), Tomoji Nakamura (Fujitsu Lab.), Ryuichi Sugie, Hideki Hashimoto (Toray Research Center), Akira Uedono (Univ. of Tsukuba), Takayuki Ohba (Tokyo Inst. of Tech.) SDM2013-167		 Ultra-thin wafer is indispensable for bumpless 3D stacking. To know the thinning damage in detail, an atomic level defec... [more] SDM2013-167
pp.13-18
ICD, SDM 2010-08-27
10:15		 Hokkaido Sapporo Center for Gender Equality [Invited Talk] Development of sub-10um Thinning Technology using Actual Device Wafers
Nobuhide Maeda, Kim Youngsuk (Univ. of Tokyo), Yukinobu Hikosaka, Takashi Eshita (FSL), Hideki Kitada, Koji Fujimoto (Univ. of Tokyo), Yoriko Mizushima (Fujitsu Labs.), Kousuke Suzuki (DNP), Tomoji Nakamura (Fujitsu Labs.), Akihito Kawai, Kazuhisa Arai (DISCO), Takayuki Ohba (Univ. of Tokyo) SDM2010-141 ICD2010-56		 200-mm and 300-mm device wafers were successfully thinned down to less than 10-μm. A 200-nm non-crystalline layer remain... [more] SDM2010-141 ICD2010-56
pp.95-97
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