| IEICE Technical Committee Submission System Conference Schedule |
Online Proceedings [Sign in] Tech. Rep. Archives |
All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| CPSY, DC (Joint) |
2010-08-03 - 2010-08-05 |
Ishikawa | Kanazawa Cultural Hall | Lightweight Fault-Tolerance for Distributed Information Appliances Takaharu Fujii, Taku Fukushima, Midori Sugaya, Tatsuo Nakajima (Waseda Univ.)  DC2010-14 |
In this paper, lightweight fault-tolerance mechanism is proposed for distributed embedded systems, such as networked inf... [more] | DC2010-14 pp.1-6 |
| DC, CPSY | 2010-04-13 17:20 |
Tokyo | Fault-tolerant FPGA Architecture Takashi Okada, Takanobu Kita, Ryota Shioya, Masahiro Goshima, Shuichi Sakai (Tokyo Univ.) CPSY2010-7 DC2010-7 |
Since electric devices for space applications are likely to experience radiation induced errors, such as the Single Even... [more] | CPSY2010-7 DC2010-7 pp.33-37 |
|
| CPSY, DC, IPSJ-SLDM, IPSJ-EMB, IPSJ-UBI, IPSJ-MBL [detail] | 2010-03-26 10:00 |
Tokyo | Distributed storage with access limitation using Shibboleth Yasushi Hirano (Nagoya Univ.) CPSY2009-81 DC2009-78 |
Information Technology Center, Nagoya University joins the UPKI-Fed which is an academic federa- tion for education and... [more] |
CPSY2009-81 DC2009-78 pp.1-4 |
|
| SS | 2010-03-08 13:10 |
Kagoshima | Kagoshima Univ. | Introducing N-Version Programming in the Product Line of the Safety Critical System Tsuneo Nakanishi, Kenji Hisazumi, Akira Fukuda (Kyushu Univ.) SS2009-68 |
The N-version programming, which uses diverse components with a single specification but multiple implementations and pe... [more] | SS2009-68 pp.121-126 |
| IPSJ-SLDM, VLD, CPSY, RECONF [detail] | 2010-01-27 14:05 |
Kanagawa | Keio Univ (Hiyoshi Campus) | An Implementation of Fail-soft Systems with Adaptive Fault Tolerance using SRAM-based FPGAs Satoshi Fujie, Ryoji Noji, Yuki Yoshikawa, Hideyuki Ichihara, Tomoo Inoue (Hiroshima City Univ.) VLD2009-93 CPSY2009-75 RECONF2009-78 |
Fail-soft systems with reconfigurable devices, which recover themselves by repeating isolation of faulty portions with g... [more] | VLD2009-93 CPSY2009-75 RECONF2009-78 pp.149-154 |
| NLP | 2009-08-03 10:20 |
Kochi | Ising Spin-Grass Error Correction for Unreliable Nanoelectronic Logic Circuits Yasuhiro Okada, Hisato Fujisaka, Takeshi Kamio, Chang-Jun Ahn, Kazuhisa Haeiwa (Hiroshima City Univ.) NLP2009-45 |
This paper presents a fault and defect tolerance technique based on Ising spin-glass (ISG) for nanoelectronic logic circ... [more] | NLP2009-45 pp.7-12 |
|
| NS, RCS (Joint) |
2009-07-16 09:10 |
Hokkaido | Hokkaido University (Hokkaido) | On Storage Capacity Control Methods for Fault-Tolerant Peer-to-Peer Storage System Hideaki Iiduka, Masato Uchida, Masato Tsuru, Yuji Oie (KIT) NS2009-43 |
To take the fault tolerance for data redundancy into a peer-to-peer storage system network plays an important role as o... [more] |
NS2009-43 pp.1-6 |
| ICM | 2009-07-09 14:25 |
Yamagata | Implementation and Evaluation of Automatic Failure Point Detection Algorithm for Large-Scale Network Yuji Kamite, Rei Tamagawa, Shin Abe (NTT Communications) ICM2009-14 |
To give higher reliability to distributed network, we have been investigating the algorithm that automatically identifie... [more] | ICM2009-14 pp.7-12 |
|
| DC, CPSY | 2009-04-21 13:00 |
Tokyo | Akihabara Satellite Campus, Tokyo Metropolitan Univ. | Evaluation of a Metropolis Algorithm for Constructing Unstructured Overlay Networks Tatsushi Takamura, Tatsuhiro Tsuchiya, Tohru Kikuno (Osaka Univ.) CPSY2009-3 DC2009-3 |
Peer-to-peer(P2P) systems use a virtual network called an overlay network to route messages to distinations. Some algor... [more] |
CPSY2009-3 DC2009-3 pp.13-17 |
| DC, CPSY | 2009-04-21 13:50 |
Tokyo | Akihabara Satellite Campus, Tokyo Metropolitan Univ. | Fast Soft Error Rate Estimation for Circuits Containing Arithmetic Units Motoharu Hirata, Masayoshi Yoshimura, Yusuke Matsunaga, Hiroto Yasuura (Kyushu Univ.) CPSY2009-5 DC2009-5 |
This paper describes soft errors which are errors in LSI that are due to external radiation.The soft error rate (SER) wh... [more] | CPSY2009-5 DC2009-5 pp.25-30 |
| VLD | 2009-03-11 14:50 |
Okinawa | Fault Tolerant Datapath Synthesis Starting with Triple Algorithm Redundancy Yutaka Tsuboishi, Mineo Kaneko (JAIST) VLD2008-132 |
In this paper, we investigate the problem to synthesize a fault-tolerant datapath from a triplicated computation algorit... [more] | VLD2008-132 pp.35-40 |
|
| IA, SITE | 2009-03-05 16:20 |
Kumamoto | musasabi: a P2P-based Platform for Stable Services Kota Abe (Osaka City Univ.) SITE2008-66 IA2008-89 |
Since P2P systems must handle unexpected peer leave, P2P systems are hard to implement compared to server-client systems... [more] | SITE2008-66 IA2008-89 pp.131-136 |
|
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2008-11-17 16:30 |
Fukuoka | Kitakyushu Science and Research Park | Evaluating the reliability of Highly Reliable Cell Circuits Keiichi Hotta, Takashi Nakada, Masaki Nakanishi, Shigeru Yamashita, Yasuhiko Nakashima (Nara Institute of Science and Technology) VLD2008-75 DC2008-43 |
Recently, the shrinking process causes transistor variation and growth of error rate. Highly Reliable Cells (HRCs) have ... [more] | VLD2008-75 DC2008-43 pp.91-96 |
| DC | 2008-10-20 13:30 |
Tokyo | National Center of Sciences | Fault-Tolerant Multilayer Neural Networks for Multiple Weight-and-Neuron-Fault Kazuhiro Nishimura (Polytech Univ.), Masato Ootsu (JP Network), Tadayoshi Horita (Polytech Univ.), Itsuo Takanami (Ichinoseki kousen (former)) DC2008-22 |
The architecture of artificial neural networks, which are derived from brain mechanisms, are quite different from ordina... [more] | DC2008-22 pp.1-6 |
| DC | 2008-10-20 13:55 |
Tokyo | National Center of Sciences | An implementation of a fault-tolerant 2D systolic array on an FPGA and its evaluation Tadayoshi Horita (Polytechnic Univ.), Itsuo Takanami (Ichinoseki National College of Tech. in former times) DC2008-23 |
A fault-tolerant self-reconfigurable 2D systolic array to calculate matrix multiplications is implemented on an FPGA. ... [more] |
DC2008-23 pp.7-12 |
| RECONF | 2008-09-26 13:20 |
Okayama | Okayama Univ. | A study of a fault-tolerant System using TFT method Atsuhiro Kanamaru, Hiroyuki Kawai, Yoshiki Yamaguchi, Moritoshi Yasunaga (Univ. of Tsukuba) RECONF2008-36 |
This paper deals with a dependable computing system using a reconfigurable device. The work carried out for this purpos... [more] | RECONF2008-36 pp.81-86 |
| CQ | 2008-07-18 13:50 |
Hokkaido | Kushiro Learning Center | Multipath Routing Method for Improving Fault Tolerance in Multilayer Networks Kazuaki Oda, Hisao Yamamoto (Musashi Institute of Tech.) CQ2008-25 |
Along with development of high speed and large capacity IP network, Multilayer Networks that where various networks are ... [more] | CQ2008-25 pp.67-72 |
| DC | 2008-06-20 13:50 |
Tokyo | Kikai-Shinko-Kaikan Bldg | A Design of Highly Dependable Processor with the Tolerance to Multiple Simultaneous Transient Faults Makoto Kimura, Masayuki Arai, Satoshi Fukumoto, Kazuhiko Iwasaki (Tokyo Metroplitan Univ.) DC2008-13 |
We propose the methodology to make a highly reliable processor against multiple simultaneous transient faults. In our pr... [more] | DC2008-13 pp.13-18 |
| DC, CPSY | 2008-04-23 11:30 |
Tokyo | Tokyo Univ. | A Study on Reliability and Performance of FPGA-Based Fault Tolerant Systems Ryoji Noji, Satoshi Fujie, Yuki Yoshikawa, Hideyuki Ichihara, Tomoo Inoue (Hiroshima City Univ.) CPSY2008-4 DC2008-4 |
FPGAs (Field-Programmable Gate Arrays), which can implement arbitrary logic circuits any number of times by loading con... [more] |
CPSY2008-4 DC2008-4 pp.19-24 |
| DC, CPSY, IPSJ-SLDM, IPSJ-EMB | 2008-03-28 13:50 |
Kagoshima | A Functional Unit with Small Variety of Highly Reliable Cells and Its Evaluation Kazunori Suzuki, Takashi Nakada, Masaki Nakanishi, Shigeru Yamashita, Yasuhiko Nakashima (NAIST) DC2007-112 CPSY2007-108 |
Recently, the shrinking process causes growth of error rate. We have proposed new standard cells in which transistors ar... [more] | DC2007-112 CPSY2007-108 pp.167-172 |
|
[Return to Top Page]