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 Results 21 - 32 of 32 [Previous]  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
VLD, DC, CPSY, RECONF, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC
(Joint) [detail]		 2019-11-15
16:35		 Ehime Ehime Prefecture Gender Equality Center Non-stop embedded OS with Trace Buffer
Haruki Shishido, Yamasaki Nobuyuki (Keio Univ.) CPSY2019-51		 Embedded system that is designed to operate a particular device has a feature that, in addition to power saving and reso... [more] CPSY2019-51
pp.77-82
CPSY, DC, IPSJ-ARC [detail] 2019-07-24
14:00		 Hokkaido Kitami Civic Hall Implimentation of Fluid scheduling by Using IPC control unit
Yuta Tsukahara, Nobuyuki Yamasaki (Keio Univ.) CPSY2019-19 DC2019-19		  [more] CPSY2019-19 DC2019-19
pp.27-32
CPSY, DC, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC [detail] 2019-03-17
15:50		 Kagoshima Nishinoomote City Hall (Tanega-shima) Real-Time Voltage and Frequency Scaling Scheme with IPC Controlling for SMT Processor
Hiromi Suzuki, Yousuke Ide, Yuta Tsukahara, Nobuyuki Yamasaki (Keio Univ) CPSY2018-106 DC2018-88		 In the field of Real-Time embedded systems, both of high-performance and low-power consumption are required. In this pap... [more] CPSY2018-106 DC2018-88
pp.161-166
CPSY, DC, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC [detail] 2019-03-17
16:10		 Kagoshima Nishinoomote City Hall (Tanega-shima) Design of Vector Unit for AI Acceleration in Embedded Processor
Yosuke Ide, Hiromi Suzuki, Yuki Mori, Nobuyuki Yamasaki (Keio Univ.) CPSY2018-107 DC2018-89		 In recent years, AI is applied in wide range of fields. Its learning and recognition are based on Neural Network (NN), w... [more] CPSY2018-107 DC2018-89
pp.167-172
CPSY, DC, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC [detail] 2018-03-08
11:00		 Shimane Okinoshima Bunka-Kaikan Bldg. Design of Context Cache on IO Core Processor for Embedded Real-Time Systems
So Haramura, Haruki Shishido, Nobuyuki Yamasaki (Keio Univ.) CPSY2017-143 DC2017-99		  [more] CPSY2017-143 DC2017-99
pp.233-237
CPSY, DC, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC [detail] 2018-03-08
11:25		 Shimane Okinoshima Bunka-Kaikan Bldg. Design of time synchronization scheme using Responsive Link
Yuta Tsukahara, Nobuyuki Yamasaki (Keio Univ.) CPSY2017-144 DC2017-100		  [more] CPSY2017-144 DC2017-100
pp.239-244
CPSY, DC, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC [detail] 2018-03-08
11:50		 Shimane Okinoshima Bunka-Kaikan Bldg. IPC Control Unit for Fluid Scheduling
Masaki Takeuchi, Nobuyuki Yamasaki (Keio Univ.) CPSY2017-145 DC2017-101		  [more] CPSY2017-145 DC2017-101
pp.245-250
CPSY, DC, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC [detail] 2017-03-09
16:30		 Okinawa Kumejima Island An Improvement of Vector Units on RMT Processor for Real-Time Processing
Tsukasa Matsui, Otsuki Shuhei, Nobuyuki Yamasaki (Keio Univ.) CPSY2016-141 DC2016-87		  [more] CPSY2016-141 DC2016-87
pp.57-62
CPSY, IPSJ-EMB, IPSJ-SLDM, DC [detail] 2015-03-06
14:50		 Kagoshima   A Resource Utilization Aware Method to Improve Throughput on RMT Processor
Taro Murata, Kensuke Kaneda, Masayoshi Takasu, Keigo Mizotani, Yusuke Hatori, Nobuyuki Yamasaki (Keio Univ.) CPSY2014-166 DC2014-92		 SMT (Simultaneous MultiThreading) architecture is suitable for embedded processors which have area
constraints, it is b... [more]		 CPSY2014-166 DC2014-92
pp.25-30
CPSY, IPSJ-EMB, IPSJ-SLDM, DC [detail] 2015-03-06
15:15		 Kagoshima   Adaptive Error Correcting Code by Priority on RMT Processor
Tsukasa Matsui, Shuma Hagiwara, Keigo Mizotani, Nobuyuki Yamasaki (Keio Univ.) CPSY2014-167 DC2014-93		 In embedded real-time systems such as robots, there are requirements for real-time constraints, high throughput and low ... [more] CPSY2014-167 DC2014-93
pp.31-36
CPSY, IPSJ-EMB, IPSJ-SLDM, DC [detail] 2015-03-07
10:45		 Kagoshima   Real-Time Static Voltage and Frequency Scaling on RMT Processor with Instructions Per Clock Cycle Control
Kenji Yamada, Yusuke Hatori, Shuma Hagiwara, Keigo Mizotani, Masayoshi Takasu, Nobuyuki Yamasaki (Keio Univ.) CPSY2014-179 DC2014-105		 In Recent embedded real-time systems, not only high performance but also low power consumption is
required. To meet the... [more]		 CPSY2014-179 DC2014-105
pp.101-106
DC, CPSY, IPSJ-SLDM, IPSJ-EMB 2008-03-27
14:05		 Kagoshima   Aperiodic Packet Scheduling in Real-Time Communication using Responsive Link
Yuji Fujita, Shinpei Kato, Nobuyuki Yamasaki (Keio Univ.) 		Responsive Link has many unique features including priority based packet overtaking, and it is possible to realize real-... [more]
 Results 21 - 32 of 32 [Previous]  /   
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