IEICE Technical Committee Submission System
Conference Schedule
Online Proceedings
[Sign in]
Tech. Rep. Archives
    [Japanese] / [English] 
( Committee/Place/Topics  ) --Press->
 
( Paper Keywords:  /  Column:Title Auth. Affi. Abst. Keyword ) --Press->

All Technical Committee Conferences  (Searched in: All Years)

Search Results: Conference Papers
 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 21 - 40 of 109 [Previous]  /  [Next]  
Committee Date Time Place Paper Title / Authors Abstract Paper #
VLD, DC, CPSY, RECONF, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC
(Joint) [detail]
2019-11-14
16:35
Ehime Ehime Prefecture Gender Equality Center Test Generation for Hardware Trojan Detection Using the Delay Difference of a Pair of Independent Paths
Suguru Rikino, Yushiro Hiramoto, Satoshi Ohtake (Oita Univ.) VLD2019-46 DC2019-70
Hardware Trojan detection is important to ensure security of LSIs.
If a hardware Trojan is inserted in a signal line o... [more]
VLD2019-46 DC2019-70
pp.151-155
CPSY, DC, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC [detail] 2019-03-18
09:00
Kagoshima Nishinoomote City Hall (Tanega-shima) A Test Generation Method for Resistive Open Faults Using MAX-SAT Problem
Hiroshi Yamazaki, Toshinori Hosokawa (Nihon Univ.), Masayoshi Yoshimura (Kyoto Sangyo Univ.), Masayuki Arai (Nihon Univ.), Hiroyuki Yotsuyanagi, Masaki Hashizume (Tokushima Univ.) CPSY2018-117 DC2018-99
In VLSI testing, stuck-at fault model and transition fault model have been widely used. However, with advance of semicon... [more] CPSY2018-117 DC2018-99
pp.315-320
EE, IEE-SPC
(Joint)
2019-03-07
14:40
Okinawa   Evaluation of Detection Accuracy based on The Influence of Power Distortion in System Protection Relay
Rukai Sun, Nishimura Kazunori (Hiroshima Ins. Tech.), Yonemoto Kazuhiro, Hiroi Hideyuki, Tsuchida Takashi (KDK) EE2018-58
In recent years, ground fault accidents such as electric shock and fire have occurred frequently due to the rapid rise i... [more] EE2018-58
pp.1-6
EE 2019-01-16
11:00
Kumamoto KCIC Fault detection of photovoltaic strings using parameter estimation of string circuit model
Shigeomi Hara, Makoto Kasu (Saga Univ.) EE2018-39
We aim at detecting faults and recognizing those sorts for photovoltaic strings in mega solar power plants. We use measu... [more] EE2018-39
pp.7-11
MoNA 2018-08-02
14:05
Hokkaido Otaru Citizen Center Extended GEDIR Routing with Detection of Node Failure
Naoshi Yakura, Hiroaki Higaki (Tokyo Denki Univ.) MoNA2018-7
In data message transmissions in wireless ad-hoc networks, it is assumed that all wireless node correctly work in accord... [more] MoNA2018-7
pp.7-12
EMCJ 2018-07-27
14:55
Tokyo Kikai-Shinko-Kaikan Bldg. Fundamental Study on Data Injection Attacks Using a Hardware Trojan against ICT Devices
Shugo Kaji (NAIST), Masahiro Kinugawa (NIT), Daisuke Fujimoto, Yu-ichi Hayashi (NAIST) EMCJ2018-30
Intentional electromagnetic interference (IEMI) is a threat to destroy integrated circuits (ICs) or elements by using hi... [more] EMCJ2018-30
pp.49-54
HWS, ISEC, SITE, ICSS, EMM, IPSJ-CSEC, IPSJ-SPT [detail] 2018-07-26
15:25
Hokkaido Sapporo Convention Center A Study on Systematic Insertion of Hardware Trojan Based on Path Delay
Akira Ito, Rei Ueno, Naofumi Homma, Takafumi Aoki (Tohoku Univ.) ISEC2018-44 SITE2018-36 HWS2018-41 ICSS2018-47 EMM2018-43
This paper presents a non-reversible and analytical method for inserting a path delay hardware Trojan (PDHT). The conven... [more] ISEC2018-44 SITE2018-36 HWS2018-41 ICSS2018-47 EMM2018-43
pp.349-356
HWS 2018-04-13
15:25
Fukuoka   A Compact Countermeasure against Laser-Fault-Injection Attack Utilizing Bulk-Current Sensor and Instantaneous Supply-Shunt Circuit
Kohei Matsuda (Kobe Univ.), Tatsuya Fujii, Shoji Natsu, Takeshi Sugawara, Kazuo Sakiyama (UCE), Yu-ichi Hayashi (NAIST), Makoto Nagata, Noriyuki Miura (Kobe Univ.) HWS2018-8
A compact sense-and-reacts countermeasure is proposed against laser fault injection attack on cryptographic processors. ... [more] HWS2018-8
pp.41-44
SS, MSS 2018-01-18
15:45
Hiroshima   Study on Deployment of a Computer Algebra System for Generating Random Test Patterns for Combinational Circuits
Tsutomu Inamoto, Yoshinobu Higami (Ehime Univ.) MSS2017-57 SS2017-44
In this study, the authors display an attempt of deploying a computer algebra system to improve the fault detection rate... [more] MSS2017-57 SS2017-44
pp.59-64
SS, MSS 2018-01-19
12:45
Hiroshima   Classification of problem detection for incomplete software requirements using the development standard process
Toma Miyamura (NAIST), Shinji Kawaguchi, Naoki Ishihama, Kazuki Kakimoto (JAXA), Hajimu Iida (NAIST), Masafumi Katahira (JAXA) MSS2017-66 SS2017-53
Software faults in spacecraft software leads to mission failures. To identify software faults, we focus on the incomplet... [more] MSS2017-66 SS2017-53
pp.107-112
SANE 2017-10-04
13:50
Tokyo Maison franco - japonaise (Tokyo) Fault Detection in the Curah Lengkong at Mt Semeru, Indonesia -- Topographic and Ground Penetrating Radar Evidences --
Christopher Gomez (Kobe Univ.), Franck Lavigne (Sorbonne Univ.), Danang Sri Hadmoko (Univ. Gadja Madah) SANE2017-44
The Semeru Volcano is a stratovolcano in East Java in Indonesia, that is
well known for its regular phreatomagmatic eru... [more]
SANE2017-44
pp.7-10
EMCJ, IEE-EMC, IEE-MAG 2017-05-18
14:43
Overseas Nanyang Technological University [Poster Presentation] A Method of Fault Detection in Encryption Device Based on Leaked EM Information from Adder Circuit
Naoto Saga (Tohoku Univ.), Yu-ichi Hayashi (NAIST), Takaaki Mizuki, Hideaki Sone (Tohoku Univ.) EMCJ2017-9
In this study, we observe leaked EM information radiated from an encryption device to estimate a timing of fault caused ... [more] EMCJ2017-9
pp.5-6
ASN, MoNA, MICT
(Joint)
2017-01-20
14:40
Oita   Defect Causal Analysis in Solar Panel using Thermal Image : A Deep Learning Approach
Seungho Lee, Makoto Suzuki, Hiroyuki Morikawa (UTokyo) ASN2016-87
Deteriorated solar panels cause not only decreasing of power generation but also significantly safety concerns such as c... [more] ASN2016-87
pp.95-100
EMCJ 2016-09-16
11:55
Hyogo University of Hyogo TDR with Utility-Pole-Distance Resolution Considering Mode Conversion for Detection of Fault Type in Power Distribution Lines
Tohlu Matsushima, Takashi Hisakado, Osami Wada (Kyoto Univ.), Shinpei Oe, Tsuyoshi Sasaoka, Yasuharu Sakai (Kansai Electric Power Co. Inc.) EMCJ2016-52
It is necessary to detect a fault point in a distribution system for accident restoration in power grid. Applying a puls... [more] EMCJ2016-52
pp.13-18
OCS, NS, PN
(Joint)
2016-06-23
09:00
Hokkaido Hokkaido University Low Load Flow Quality Measurement for Data Center Network
Tatsuya Fukuda, Yusuke Shinohara, Shinjiro Yagi (NEC) NS2016-29
It is important for data center operators to monitor their network and ensuring that the network work f... [more] NS2016-29
pp.7-12
DC 2016-06-20
14:50
Tokyo Kikai-Shinko-Kaikan Bldg. Random Test Pattern Generation based on Entropy
Toshiaki Ohmameuda (Nat. Inst. Tech., Gunma Coll.) DC2016-13
In this paper the random test pattern generation method based on entropy is proposed.
The circuits in this paper are c... [more]
DC2016-13
pp.19-23
VLD, CAS, MSS, SIP 2016-06-16
10:10
Aomori Hirosaki Shiritsu Kanko-kan Automatic Test Pattern Generation for Multiple Stuck-At Faults: When Testing for Single Faults is Insufficient
Conrad JinYong Moore, Amir Masoud Gharehbaghi, Masahiro Fujita (Univ. of Tokyo) CAS2016-3 VLD2016-9 SIP2016-37 MSS2016-3
As fabricated circuitry gets larger and denser, modern industrial ATPG techniques which focus on the detection of single... [more] CAS2016-3 VLD2016-9 SIP2016-37 MSS2016-3
pp.13-18
ET 2016-03-05
16:15
Kagawa Kawaga Univ. (Saiwai-cho Campus) A Proposal for a Misconfiguration Detection Method based on Program Analysis Techniques for Network Construction Exercises for Beginners
Yuichiro Tateiwa, Naohisa (NIT) ET2015-106
In this study, we propose a method that specifies regions (we call them fault regions) where misconfigurations concernin... [more] ET2015-106
pp.71-76
VLD 2016-02-29
15:50
Okinawa Okinawa Seinen Kaikan ILP Based Synthesis of Soft-Error Tolerant Datapaths Considering Adjacency Constraint between Components
Junghoon Oh, Mineo Kaneko (JAIST) VLD2015-116
As the device size decreases, the reliability degradation due to soft-errors is becoming one of the serious issues in VL... [more] VLD2015-116
pp.31-36
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]
2015-12-01
14:40
Nagasaki Nagasaki Kinro Fukushi Kaikan On discrimination method of a resistive open using delay variation induced by signal transitions on adjacent lines
Kotaro Ise, Hiroyuki Yotsuyanagi, Masaki Hashizume (Tokushima Univ.), Yoshinobu Higami, Hiroshi Takahashi (Ehime Univ.) VLD2015-42 DC2015-38
The effect of a resistive open results in small delay in an IC. It is difficult to test small delay since signal delay a... [more] VLD2015-42 DC2015-38
pp.31-36
 Results 21 - 40 of 109 [Previous]  /  [Next]  
Choose a download format for default settings. [NEW !!]
Text format pLaTeX format CSV format BibTeX format
Copyright and reproduction : All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)


[Return to Top Page]

[Return to IEICE Web Page]


The Institute of Electronics, Information and Communication Engineers (IEICE), Japan