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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| IN, NV (Joint) |
2015-07-17 11:15 |
Hokkaido | Hokkaido University | [Invited Talk]
Exploiting ZDDs on Constrained Dynamic Programming Problems Norihito Yasuda (Hokkaido Univ.)  IN2015-34 |
Dynamic Programming is a fundamental tool for many optimization problems. However, in practical situations, in addition ... [more] | IN2015-34 pp.67-72 |
| CQ | 2015-07-06 13:00 |
Nara | Nara Institute of Science and Technology | [Poster Presentation]
Path Enumeration Algorithm Using Zero-Suppressed Binary Decision Diagram for Path Selection in Overlay Networks Koki Sonoda, Jun Kawahara, Masahiro Sasabe, Shoji Kasahara (NAIST) CQ2015-29 |
For end-to-end communication in overlay networks, we need to quickly select an appropriate path from the viewpoints of t... [more] | CQ2015-29 pp.51-54 |
| DC | 2015-06-16 16:25 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | Using binary decision diagrams for constraint handling in test case generation Tatsuhiro Tsuchiya (Osaka Univ.) DC2015-21 |
This paper discusses constraint handling in test case generation for Combinatorial Interaction Testing (CIT). CIT requir... [more] | DC2015-21 pp.31-34 |
| COMP | 2014-12-05 11:00 |
Kumamoto | Sojo University | On Zero-Suppressed Binary Decision Diagrams and Complexity Theory Hiroki Morizumi (Shimane Univ.) COMP2014-34 |
Zero-suppressed binary decision diagrams (ZDDs) are a data structure representing Boolean functions, and one of the most... [more] | COMP2014-34 pp.17-19 |
| IBISML | 2014-11-18 15:00 |
Aichi | Nagoya Univ. | [Poster Presentation]
Enumerating all the optimal solutions of multiple travelling salesman problem by using simpath algorithm Masashi Ogawa, Masato Inoue (Waseda Univ.) IBISML2014-78 |
In this manuscript, we propose an exact method which answers all the optimal solutions of "multiple traveling salesman p... [more] | IBISML2014-78 pp.321-328 |
| COMP | 2014-10-08 15:15 |
Tokyo | Chuo University | Fast Indexing All Eulerian Trails Using Permutation Decision Diagrams Yuma Inoue, Shin-ichi Minato (Hokkaido Univ.) COMP2014-30 |
An Eulerian trail is a trail containing all edges of a given graph exactly once. Although counting problem of Eulerian ... [more] |
COMP2014-30 pp.25-29 |
| CS, NS, IN (Joint) |
2014-09-11 10:00 |
Miyagi | Tohoku Univ. Research Institute of Electrical Communication 2gokan | Packet Classification for Global Network View of SDN with MDDs Takeru Inoue, Toru Mano, Kimihiro Mizutani (NTT), Shin-ichi Minato (Hokkaido Univ.), Osamu Akashi (NTT) IN2014-50 |
In software-defined networking, applications are allowed to access a global view of the network so as to provide sophis... [more] |
IN2014-50 pp.1-6 |
| QIT (2nd) |
2013-11-18 11:20 |
Tokyo | Waseda Univ. | A Representation of Quantum Graph States Using Binary Decision Diagrams Yuto Hirakuri, Hidefumi Hiraishi, Hiroshi Imai (Univ. of Tokyo) |
We discuss an efficient classical simulation of measurement-based quantum computation (MQC), focusing on relationships b... [more] | |
| RECONF | 2013-09-19 13:50 |
Ishikawa | Japan Advanced Institute of Science and Technology | A Packet Classifier using Parallel EVMDD(k) Machine Hiroki Nakahara (Kagoshima Univ.), Tsutomu Sasao (Meiji Univ.), Munehiro Matsuura (Kyushu Inst. of Tech.) RECONF2013-34 |
A decision diagram machine~(DDM) is a special-purpose processor that uses special instructions to evaluate a decision... [more] |
RECONF2013-34 pp.85-90 |
| IN, NV (Joint) |
2013-07-18 14:55 |
Hokkaido | Hokkaido Univ. Faculty of Eng. Academic Lounge 3 | [Invited Talk]
Graphillion: Software Library for Very Large Sets of Graphs Takeru Inoue (JST ERATO) IN2013-43 |
Several graph libraries have been developed in the past few decades, but they were designed to work with a few graphs e... [more] |
IN2013-43 pp.43-47 |
| COMP | 2013-03-18 13:45 |
Gifu | Gifu University | Compact and Fast Indices Based on Zero-Suppressed Binary Decision Diagrams Shuhei Denzumi (Hokkaido Univ.), Jun Kawahara (NAIST), Koji Tsuda (AIST/JST), Hiroki Arimura (Hokkaido Univ.), Shin-ichi Minato (Hokkaido Univ./JST), Kunihiko Sadakane (NII) COMP2012-56 |
In many real-life problems, we are often faced with manipulating families of sets. Manipulation of large-scale set famil... [more] | COMP2012-56 pp.23-30 |
| COMP | 2012-06-21 09:55 |
Hokkaido | Hokkaido University | Rich Operations for Manipulating Sequence Binary Decision Diagrams Shuhei Denzumi, Hiroki Arimura, Shin-ichi Minato (Hokkaido Univ.) COMP2012-13 |
Manipulating large sequence data is important problem in string processing field. In this paper, we deal with sequence b... [more] | COMP2012-13 pp.9-16 |
| DE | 2012-06-06 14:30 |
Tokyo | NII、12F Room1208, 1210 | Recipe Recommendation Based on Efficient Set Operations Yasuyuki Shirai (JST), Koji Tsuruma (NEC Software Hokkaido), Satoshi Oyama (Hokkaido University), Hiroyuki Takashima (JST) DE2012-12 |
We have been developping the efficient representation for huge data combination and the set recommendation method base... [more] |
DE2012-12 pp.67-72 |
| VLD, CPSY, RECONF, IPSJ-SLDM [detail] | 2012-01-25 13:30 |
Kanagawa | Hiyoshi Campus, Keio University | On a Decomposed MTMDDs for CF Machine Hiroki Nakahara (Kagoshima Univ.), Tsutomu Sasao, Munehiro Matsuura (KIT) VLD2011-96 CPSY2011-59 RECONF2011-55 |
A decomposed multi-terminal multi-valued decision diagrams for characteristic function~(MTMDDs for CF) represents deco... [more] |
VLD2011-96 CPSY2011-59 RECONF2011-55 pp.31-36 |
| COMP | 2011-05-11 14:30 |
Nagano | Shinshu Univ. | Edge-Unfoldings of Platonic Solids Never Overlap Takashi Horiyama, Wataru Shoji (Saitama Univ.) COMP2011-14 |
We solve an open problem for hundreds of years: Is every edge-unfolding of Platonic solids nonoverlapping? The answer ... [more] |
COMP2011-14 pp.17-23 |
| IBISML | 2011-03-28 16:50 |
Osaka | Nakanoshima Center, Osaka Univ. | Enumerating Feature-Sets with Submodularity Yoshinobu Kawahara (Osaka Univ.), Koji Tsuda (AIST), Takashi Washio (Osaka Univ.), Akiko Takeda (Keio Univ.), Shin-ichi Minato (Hokkaido Univ.) IBISML2010-113 |
Selecting relevant features is a fundamental task in machine learning. Although many approaches have been investigated s... [more] | IBISML2010-113 pp.63-68 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2010-12-01 11:25 |
Fukuoka | Kyushu University | A Sequential Test Generation Method and a Binding Method for Testability Using Behavioral Description Ryoichi Inoue, Hiroaki Fujiwara, Toshinori Hosokawa (Nihon Univ.), Hideo Fujiwara (NAIST) VLD2010-76 DC2010-43 |
Although many works on test generation algorithms for sequential circuits have been reported so far, it is still very ha... [more] | VLD2010-76 DC2010-43 pp.143-148 |
| IBISML | 2010-06-15 16:05 |
Tokyo | Takeda Hall, Univ. Tokyo | An EM algorithm on binary decision diagrams with order encoding for propositional logic-based probabilistic models Masakazu Ishihata, Yoshitaka Kameya, Taisuke Sato (Tokyo Inst. of Tech.), Shin-ichi Minato (Hokkaido Univ) IBISML2010-23 |
We propose an EM algorithm on Binary Decision Diagrams (BDDs) with order encoding for propositional logic-based probabil... [more] | IBISML2010-23 pp.155-165 |
| ED, SDM | 2010-02-23 11:00 |
Okinawa | Okinawaken-Seinen-Kaikan | Compact Reconfigurable BDD Logic Circuits utilizing GaAs Nanowire Network Yuta Shiratori, Kensuke Miura (Hokkaido Univ.), Seiya Kasai (Hokkaido Univ./JST) ED2009-208 SDM2009-205 |
We describe a reconfigurable binary-decision-diagram logic circuit based on Shannon’s expansion of Boolean logic functio... [more] | ED2009-208 SDM2009-205 pp.71-76 |
| SDM, ED | 2008-07-10 10:00 |
Hokkaido | Kaderu２・７ | 2-bit Arithmetic Logic Unit Utilizing Hexagonal BDD Architecture for Implemention of Nanoprocessor on GaAs Nanowire Network Hong-Quan Zhao (Hokkaido Univ.), Seiya Kasai (Hokkaido Univ./JST), Tamotsu Hashizume (Hokkaido Univ.) ED2008-66 SDM2008-85 |
2-bit arithmetic logic unit (ALU) utilizing the binary-decision diagram (BDD) logic architecture for nanoprocessor is fa... [more] | ED2008-66 SDM2008-85 pp.139-144 |
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