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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
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Committee Date Time Place Paper Title / Authors Abstract Paper #
SCE 2020-01-17
13:15		 Kanagawa   [Poster Presentation] Design of SFQ convolutional computation processor for convolutional neural network
Fei Ke (Yokohama Natl. Univ.), Ao Ren, Yanzhi Wang (Northeastern Univ.), Olivia Chen, Yuki Yamanashi, Nobuyuki Yoshikawa (Yokohama Natl. Univ.) SCE2019-32		  [more] SCE2019-32
pp.11-13
SCE 2020-01-17
13:15		 Kanagawa   [Poster Presentation] Design and Simulation of Single-Flux-Quantum Multiply-Accumulator
Zongyuan Li, Yuki Yamanashi, Nobuyuki Yoshikawa (YNU) SCE2019-33		 Multiply accumulate is a special operation in digital signal processor or some microprocessors. The hardware circuit uni... [more] SCE2019-33
pp.15-18
SCE 2019-08-09
15:25		 Ibaraki National Institute of Advanced Industrial Science and Technology Demonstration of an 8-point 7-bit SFQ-based FFT processor
Fei Ke, Yuki Yamanashi, Nobuyuki Yoshikawa (Yokohama National Univ.) SCE2019-18		  [more] SCE2019-18
pp.55-60
SCE 2017-04-21
10:25		 Tokyo Kikai-Shinko-Kaikan Bldg. Design of Power Divider For AQFP logic
Yuge Xing, Naoki Takeuchi, Yuki Yamanashi, Nobuyuki Yoshikawa (Yokohama Nat. Univ.) SCE2017-2		 We have been investigating adiabatic-quantum-flux-parametron (AQFP) logic as an ultra-low power logic circuit with zero ... [more] SCE2017-2
pp.7-11
SCE 2015-08-05
10:00		 Kanagawa Yokohama National Univ. Design of an Extremely Energy-Efficient Hardware Algorithm Using Adiabatic Superconductor Logic and Its Digital Modeling Approach
Qiuyun Xu, Christopher L. Ayala, Naoki Takeuchi, Thomas Ortlepp, Yuki Yamanashi, Nobuyuki Yoshikawa (Yohohama Natl. Univ.) SCE2015-16		  [more] SCE2015-16
pp.47-51
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