Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
ICD, IPSJ-ARC, IPSJ-EMB |
2009-01-13 09:30 |
Osaka |
Shoushin Kaikan |
Evalutions of Prediction Router for Low-Latency On-Chip Networks Hiroki Matsutani (Keio Univ.), Michihiro Koibuchi (National Inst. of Info.The Univ), Hideharu Amano (Keio Univ.), Tsutomu Yoshinaga (The Univ. of Electro-Communications) |
[more] |
ICD2008-129 pp.1-6 |
ICD, IPSJ-ARC, IPSJ-EMB |
2009-01-13 10:00 |
Osaka |
Shoushin Kaikan |
A 820 Mb/s Baseband Processor LSI based on LDPC Coded OFDM for UWB systems Shinsuke Ushiki, Koichi Nakamura, Kazunori Shimizu, Qi Wang, Yuta Abe, Satoshi Goto, Takeshi Ikenaga (Waseda Univ.) ICD2008-130 |
This paper presents a high-throughput and highly-reliable baseband processor LSI based on LDPC coding OFDM UWB. This LSI... [more] |
ICD2008-130 pp.7-12 |
ICD, IPSJ-ARC, IPSJ-EMB |
2009-01-13 10:30 |
Osaka |
Shoushin Kaikan |
[Invited Talk]
Evolution of application processor OMAP for mobile products Masahiro Miyazaki (Texas Inst. Japan Limited) ICD2008-131 |
Abstract This presentation shows the evolution of application processor OMAP. Recently, high performance multimedia and ... [more] |
ICD2008-131 pp.13-17 |
ICD, IPSJ-ARC, IPSJ-EMB |
2009-01-13 11:30 |
Osaka |
Shoushin Kaikan |
[Invited Talk]
How and What to create and build up software for digital consumer electronics Kazuo Kajimoto (Panasonic) ICD2008-132 |
The market of digital consumer electronics (CE) has been emerging. But the pressure of cost down forces manufacturer to ... [more] |
ICD2008-132 pp.19-24 |
ICD, IPSJ-ARC, IPSJ-EMB |
2009-01-13 13:30 |
Osaka |
Shoushin Kaikan |
[Invited Talk]
Trends of automotive software platform Akihito Iwai (DENSO) |
Nowadays, automotive E/E systems have been more large-scale and complex, so that the efforts of automotive software deve... [more] |
ICD2008-133 pp.25-30 |
ICD, IPSJ-ARC, IPSJ-EMB |
2009-01-13 14:30 |
Osaka |
Shoushin Kaikan |
[Invited Talk]
Customizable Dataplane Processors for System-on-Chip Takayuki Sugawara (Tensilica K.K.) ICD2008-134 |
The architecture of Xtensa processor, which is the leading customizable processor for System-on-Chip (SOC), and its user... [more] |
ICD2008-134 pp.31-36 |
ICD, IPSJ-ARC, IPSJ-EMB |
2009-01-13 15:45 |
Osaka |
Shoushin Kaikan |
[Panel Discussion]
Past and Future of Platform-based Designs Kazuaki Murakami (Kyushu Univ.), Akihito Iwai (DENSO), Kazuo Kajimoto (Panasonic), Takayuki Sugawara (Tensilica K.K.), Masahiro Miyazaki (Texas Inst. Japan Limited) ICD2008-135 |
(To be available after the conference date) [more] |
ICD2008-135 p.37 |
ICD, IPSJ-ARC, IPSJ-EMB |
2009-01-14 09:00 |
Osaka |
Shoushin Kaikan |
The Task Design by using of LTSA and SPIN Toshiyuki Fujikura (eSOL), Akira Nonaka (Tao Bears), Masanori Usami (eSOL) |
(To be available after the conference date) [more] |
ICD2008-136 pp.39-44 |
ICD, IPSJ-ARC, IPSJ-EMB |
2009-01-14 09:30 |
Osaka |
Shoushin Kaikan |
Object-Oriented Programming and Testing Environment for an FPGA Using CORBA/GIOP Protocol Takeshi Ohkawa, Kenji Toda (AIST/ITRI) |
A small software and a circuit system are implemented on a Xilinx Spartan 3E FPGA, which handles CORBA (Common Object Re... [more] |
ICD2008-137 pp.45-50 |
ICD, IPSJ-ARC, IPSJ-EMB |
2009-01-14 10:00 |
Osaka |
Shoushin Kaikan |
A Low-Power Feild-Programmable VLSI Based on Autonomous Fine-Grain Power-Gating Masanori Hariyama, Shota Ishihara, Michitaka Kameyama (Tohoku Univ.) ICD2008-138 |
This paper presents a field-programmable VLSI(FPVLSI) based on fine-grain power gating with small overheads. The asynchr... [more] |
ICD2008-138 pp.51-55 |
ICD, IPSJ-ARC, IPSJ-EMB |
2009-01-14 10:45 |
Osaka |
Shoushin Kaikan |
Evaluation of a Heterogeneous Multi-Core Architecture for Multimedia Applications Daisuke Okumura, Hasitha Muthumala Waidyasooriya, Takehisa Matsuda, Masanori Hariyama, Michitaka Kameyama (Tohoku Univ.) ICD2008-139 |
Heterogeneous processors are attracted by the image processing and recognition applications due to their capability of d... [more] |
ICD2008-139 pp.57-62 |
ICD, IPSJ-ARC, IPSJ-EMB |
2009-01-14 11:15 |
Osaka |
Shoushin Kaikan |
Performance Evaluation of Parallelizing Compiler Cooperated Heterogeneous Multicore Architecture Using Media Applications Teruo Kamiyama, Yasutaka Wada, Akihiro Hayashi, Masayoshi Mase, Hirofumi Nakano, Takeshi Watanabe, Keiji Kimura, Hironori Kasahara (Waseda Univ.) |
This paper describes a heterogeneous multicore architecture having accelerator cores in addition to general purpose core... [more] |
ICD2008-140 pp.63-68 |
ICD, IPSJ-ARC, IPSJ-EMB |
2009-01-14 11:45 |
Osaka |
Shoushin Kaikan |
Local Memory Management Scheme by a Compiler for Multicore Processor Taku Momozono, Hirofumi Nakano, Masayoshi Mase, Keiji Kimura, Hironori Kasahara (Waseda Univ.) |
This paper proposes a local memory management scheme for an automatic parallelizing compiler to realize effective use o... [more] |
ICD2008-141 pp.69-74 |
ICD, IPSJ-ARC, IPSJ-EMB |
2009-01-14 13:15 |
Osaka |
Shoushin Kaikan |
Feasibility of an Embedded Virtual Machine under Parallel or Distributed Processing Environment Hirofumi Yano, Masaki Nakanishi, Shinobu Miwa, Hironori Nakajo (Tokyo Univ. of Agriculture and Tech.) |
[more] |
ICD2008-142 pp.75-80 |
ICD, IPSJ-ARC, IPSJ-EMB |
2009-01-14 13:45 |
Osaka |
Shoushin Kaikan |
Fine-Grained Dynamic Sleep Control on the Combination of High-Perfomance Cores and Low-Power Cores Naomi Seki, Lei Zhao, Daisuke Ikebuchi, Yu Kojima, Hideharu Amano (Keio Univ) |
[more] |
ICD2008-143 pp.81-86 |
ICD, IPSJ-ARC, IPSJ-EMB |
2009-01-14 14:15 |
Osaka |
Shoushin Kaikan |
Power Saving with Asynchronous Remote Procedure Call for Embedded Multi-core Processor Hiromasa Yamauchi, Takahisa Suzuki, Makiko Ito (Fujitsu Lab Ltd.,) ICD2008-144 |
Recently, multi-core processor system is increasing in the embedded system for high performance and low power consumptio... [more] |
ICD2008-144 pp.87-92 |
ICD, IPSJ-ARC, IPSJ-EMB |
2009-01-14 14:45 |
Osaka |
Shoushin Kaikan |
A Power Saving Scheme on Multicore Processors Using OSCAR API Ryo Nakagawa, Masayoshi Mase, Jun Shirako, Keiji Kimura, Hironori Kasahara (Waseda Univ.) |
Effective power reduction of an application program on multicore processors requires appropriate power control for each ... [more] |
ICD2008-145 pp.93-98 |
ICD, IPSJ-ARC, IPSJ-EMB |
2009-01-14 16:00 |
Osaka |
Shoushin Kaikan |
The Cache-Core optimization on Multi-CoreProcessors considering several overheads Yosuke Mori, Akira Moriya, Naoki Fujieda, Kenji Kise (Tokyo Inst. of Tech.) |
The number of cores in a processor increases.
If several cores access to the main memory at the same time, the
memory... [more] |
ICD2008-147 pp.105-110 |
ICD, IPSJ-ARC, IPSJ-EMB |
2009-01-14 15:30 |
Osaka |
Shoushin Kaikan |
Predicting Cache Miss Rates via Simulation Results Reuse Takatsugu Ono, Koji Inoue, Kazuaki Murakami (Kyushu Univ.), Koji Kai (Panasonic) ICD2008-146 |
[more] |
ICD2008-146 pp.99-104 |
ICD, IPSJ-ARC, IPSJ-EMB |
2009-01-14 16:30 |
Osaka |
Shoushin Kaikan |
A Low-Power Full-HD H.264 High-Profile Codec Based on a Heterogeneous Multiprocessor Architecture Kenichi Iwata, Seiji Mochizuki, Motoki Kimura, Tetsuya Shibayama, Fumitaka Izuhara, Hiroshi Ueda (Renesas Tech Corp.), Koji Hosogi, Hiroaki Nakata, Masakazu Ehama (Hitachi Ltd.), Toru Kengaku, Takuichiro Nakazawa, Hiromi Watanabe (Renesas Tech Corp.) ICD2008-148 |
A video-size-scalable H.264 High-Profile codec including 19 application-specific CPUs for extensibility to multiple stan... [more] |
ICD2008-148 pp.111-116 |
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