Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
CPSY, RECONF, VLD, IPSJ-SLDM, IPSJ-ARC [detail] |
2017-01-24 16:15 |
Kanagawa |
Hiyoshi Campus, Keio Univ. |
VLD2016-89 CPSY2016-125 RECONF2016-70 |
Not available [more] |
VLD2016-89 CPSY2016-125 RECONF2016-70 pp.133-134 |
CPSY, RECONF, VLD, IPSJ-SLDM, IPSJ-ARC [detail] |
2017-01-24 16:55 |
Kanagawa |
Hiyoshi Campus, Keio Univ. |
FPGA Implementation of Mahalanobis Distance-Based Outlier Detection for Streaming Data Yuto Arai, Shin'ichi Wakabayashi, Shinobu Nagayama, Masato Inagi (Hiroshima City Univ.) VLD2016-91 CPSY2016-127 RECONF2016-72 |
This paper focuses on a method to detect outliers in streaming data, and proposes a fast FPGA implementation of outlier ... [more] |
VLD2016-91 CPSY2016-127 RECONF2016-72 pp.141-146 |
CPSY, RECONF, VLD, IPSJ-SLDM, IPSJ-ARC [detail] |
2017-01-24 17:20 |
Kanagawa |
Hiyoshi Campus, Keio Univ. |
A New Residue Addition Algorithm Using Signed-Digit Numbers and Its Application to RSA Encryption Kazumasa Ishikawa, Yuuki Tanaka, Shugang Wei (Gunma Univ.) VLD2016-92 CPSY2016-128 RECONF2016-73 |
In this paper, we presented a new residue addition algorithm using Signed-Digit (SD) numbers for the applications such a... [more] |
VLD2016-92 CPSY2016-128 RECONF2016-73 pp.147-152 |
CPSY, RECONF, VLD, IPSJ-SLDM, IPSJ-ARC [detail] |
2017-01-24 17:45 |
Kanagawa |
Hiyoshi Campus, Keio Univ. |
Trace-Driven Emulation of Large-Scale Networks-on-Chip on FPGAs Thiem Van Chu, Kenji Kise (Tokyo Tech) VLD2016-93 CPSY2016-129 RECONF2016-74 |
[more] |
VLD2016-93 CPSY2016-129 RECONF2016-74 pp.153-158 |
CPSY, RECONF, VLD, IPSJ-SLDM, IPSJ-ARC [detail] |
2017-01-25 09:00 |
Kanagawa |
Hiyoshi Campus, Keio Univ. |
VLD2016-94 CPSY2016-130 RECONF2016-75 |
(To be available after the conference date) [more] |
VLD2016-94 CPSY2016-130 RECONF2016-75 pp.159-164 |
CPSY, RECONF, VLD, IPSJ-SLDM, IPSJ-ARC [detail] |
2017-01-25 09:25 |
Kanagawa |
Hiyoshi Campus, Keio Univ. |
Investigation of the influence of input sequences on the calculation accuracy in an approximate operation using a typical circuit Shimpei Sato, Yuta Ukon, Atsushi Takahashi (Tokyo TECH) VLD2016-95 CPSY2016-131 RECONF2016-76 |
When variable latency for digital circuits are assumed, circuits can work with a small clock period that
has the possib... [more] |
VLD2016-95 CPSY2016-131 RECONF2016-76 pp.165-170 |
CPSY, RECONF, VLD, IPSJ-SLDM, IPSJ-ARC [detail] |
2017-01-25 09:50 |
Kanagawa |
Hiyoshi Campus, Keio Univ. |
Finite state machine design for high accurate stochastic computing Masashi Tawada, Masao Yanagisawa, Nozomu Togawa (Waseda Univ.) VLD2016-96 CPSY2016-132 RECONF2016-77 |
(To be available after the conference date) [more] |
VLD2016-96 CPSY2016-132 RECONF2016-77 pp.171-174 |
CPSY, RECONF, VLD, IPSJ-SLDM, IPSJ-ARC [detail] |
2017-01-25 10:15 |
Kanagawa |
Hiyoshi Campus, Keio Univ. |
MTJ-based Nonvolatile Flip-Flop Circuit Enabling to Verify Stored Data Junya Akaike, Kimiyoshi Usami (SIT) VLD2016-97 CPSY2016-133 RECONF2016-78 |
With the spread of portable devices in recent year, products with high performance and low power consumption are require... [more] |
VLD2016-97 CPSY2016-133 RECONF2016-78 pp.175-180 |
CPSY, RECONF, VLD, IPSJ-SLDM, IPSJ-ARC [detail] |
2017-01-25 10:55 |
Kanagawa |
Hiyoshi Campus, Keio Univ. |
Thermal transient analysis and evaluation of three-dimensional stacked chips Shogo Yasuda, Kimiyoshi Usami (SIT) VLD2016-98 CPSY2016-134 RECONF2016-79 |
There is a three-dimensional stacking technology of LSI in technology for improving the density of LSI. Three-dimensiona... [more] |
VLD2016-98 CPSY2016-134 RECONF2016-79 pp.181-186 |
CPSY, RECONF, VLD, IPSJ-SLDM, IPSJ-ARC [detail] |
2017-01-25 14:00 |
Kanagawa |
Hiyoshi Campus, Keio Univ. |
An FPGA NIC Based Distributed Ledger Caching for Blockchain Yuma Sakakibara, Kohei Nakamura (Keio Univ.), Hiroki Matsutani (Keio Univ./PRESTO/NII) VLD2016-99 CPSY2016-135 RECONF2016-80 |
(To be available after the conference date) [more] |
VLD2016-99 CPSY2016-135 RECONF2016-80 pp.203-208 |
CPSY, RECONF, VLD, IPSJ-SLDM, IPSJ-ARC [detail] |
2017-01-25 14:25 |
Kanagawa |
Hiyoshi Campus, Keio Univ. |
Proxy Responses for MapReduce Delayed Task Using 10GbE FPGA Switch Koya Mitsuzuka, Ami Hayashi (Keio Univ.), Hiroki Matsutani (Keio Univ./PRESTO/NII) VLD2016-100 CPSY2016-136 RECONF2016-81 |
(To be available after the conference date) [more] |
VLD2016-100 CPSY2016-136 RECONF2016-81 pp.209-214 |
CPSY, RECONF, VLD, IPSJ-SLDM, IPSJ-ARC [detail] |
2017-01-25 14:50 |
Kanagawa |
Hiyoshi Campus, Keio Univ. |
Design and Evaluation of A Suboptimal Unidirectional Network Tomohiro Totoki, Hiroshi Nakahara, Daichi Fujiki (Keio Univ.), Michihiro Koibuchi (NII), Hideharu Amano (Keio Univ.) VLD2016-101 CPSY2016-137 RECONF2016-82 |
(To be available after the conference date) [more] |
VLD2016-101 CPSY2016-137 RECONF2016-82 pp.215-220 |