Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
IPSJ-SLDM, VLD, CPSY, RECONF [detail] |
2010-01-27 11:15 |
Kanagawa |
Keio Univ (Hiyoshi Campus) |
Expansion of Hardware in a Scalable FPGA System Hironori Nakajo (Tokyo Univ. of Agr and Tech.), Takefumi Miyoshi (Tokyo Inst. of Tech.), Satoshi Funada (e-trees.Japan, Inc), Ryuichi Sakamoto (Tokyo Univ. of Agr and Tech.) VLD2009-89 CPSY2009-71 RECONF2009-74 |
Currently, in a field of high performance computing, some FPGAs are utilized to accelerate processing against some forma... [more] |
VLD2009-89 CPSY2009-71 RECONF2009-74 pp.125-130 |
IPSJ-SLDM, VLD, CPSY, RECONF [detail] |
2010-01-27 12:40 |
Kanagawa |
Keio Univ (Hiyoshi Campus) |
An efficient hardware-oriented algorithm for regular expression matching based on parallel bit-distribution Yusaku Kaneta, Shingo Yoshizawa, Shin-ichi Minato, Hiroki Arimura, Yoshikazu Miyanaga (Hokkaido Univ.) VLD2009-90 CPSY2009-72 RECONF2009-75 |
In this paper, we study the regular expression matching problem for fast data stream processing. We present an efficient... [more] |
VLD2009-90 CPSY2009-72 RECONF2009-75 pp.131-136 |
IPSJ-SLDM, VLD, CPSY, RECONF [detail] |
2010-01-27 13:05 |
Kanagawa |
Keio Univ (Hiyoshi Campus) |
Regular Expression Pattern Matching Hardware for Realizing Iteration of Strings Using Quantifiers Yoichi Wakaba, Shin'ichi Wakabayashi, Shinobu Nagayama, Masato Inagi (Hiroshima City Univ) VLD2009-91 CPSY2009-73 RECONF2009-76 |
Regular expression pattern matching is a problem to find substrings in a given text,which match with a pattern represent... [more] |
VLD2009-91 CPSY2009-73 RECONF2009-76 pp.137-142 |
IPSJ-SLDM, VLD, CPSY, RECONF [detail] |
2010-01-27 13:30 |
Kanagawa |
Keio Univ (Hiyoshi Campus) |
A Packet Classifier Using a Parallel Branching Program Machine Hiroki Nakahara, Tsutomu Sasao, Munehiro Matsuura (Kyushu Inst. of Tech.), Yoshifumi Kawamura (Renesas Tech Corp.) VLD2009-92 CPSY2009-74 RECONF2009-77 |
A branching program machine~(BM) is a special-purpose processor that
uses only two kinds of instructions: Branch and ... [more] |
VLD2009-92 CPSY2009-74 RECONF2009-77 pp.143-148 |
IPSJ-SLDM, VLD, CPSY, RECONF [detail] |
2010-01-27 14:05 |
Kanagawa |
Keio Univ (Hiyoshi Campus) |
An Implementation of Fail-soft Systems with Adaptive Fault Tolerance using SRAM-based FPGAs Satoshi Fujie, Ryoji Noji, Yuki Yoshikawa, Hideyuki Ichihara, Tomoo Inoue (Hiroshima City Univ.) VLD2009-93 CPSY2009-75 RECONF2009-78 |
Fail-soft systems with reconfigurable devices, which recover themselves by repeating isolation of faulty portions with g... [more] |
VLD2009-93 CPSY2009-75 RECONF2009-78 pp.149-154 |
IPSJ-SLDM, VLD, CPSY, RECONF [detail] |
2010-01-27 14:30 |
Kanagawa |
Keio Univ (Hiyoshi Campus) |
Fault Recovery Technique for Softcore Processor using Partial Reconfiguration Yoshihiro Ichinomiya, Shiro Tanoue, Motoki Amagasaki, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ.) VLD2009-94 CPSY2009-76 RECONF2009-79 |
This paper presents a technique for ensuring reliable softcore processor implemented on SRAM-based Field Programmable Ga... [more] |
VLD2009-94 CPSY2009-76 RECONF2009-79 pp.155-160 |
IPSJ-SLDM, VLD, CPSY, RECONF [detail] |
2010-01-27 14:55 |
Kanagawa |
Keio Univ (Hiyoshi Campus) |
An Estimation Method of Delay Time Variation by Crosstalk in Logic Circuit Level Masayuki Kobayashi, Wataru Sento, Masahiko Toyonaga, Michiaki Muraoka (Kochi Univ.) VLD2009-95 CPSY2009-77 RECONF2009-80 |
In this paper, a method which detects crosstalk points and timing error points by using the logic simulation with the ba... [more] |
VLD2009-95 CPSY2009-77 RECONF2009-80 pp.161-166 |
IPSJ-SLDM, VLD, CPSY, RECONF [detail] |
2010-01-27 15:30 |
Kanagawa |
Keio Univ (Hiyoshi Campus) |
A remote dynamic optically reconfigurable gate array using a fiber array Yumiko Ueno, Minoru Watanabe (Shizuoka Univ.) VLD2009-96 CPSY2009-78 RECONF2009-81 |
[more] |
VLD2009-96 CPSY2009-78 RECONF2009-81 pp.167-170 |
IPSJ-SLDM, VLD, CPSY, RECONF [detail] |
2010-01-27 15:55 |
Kanagawa |
Keio Univ (Hiyoshi Campus) |
Compensation method for photodiode characteristics variation using an analog configuration context Yuji Aoyama, Minoru Watanabe (Shizuoka Univ.) VLD2009-97 CPSY2009-79 RECONF2009-82 |
[more] |
VLD2009-97 CPSY2009-79 RECONF2009-82 pp.171-174 |
IPSJ-SLDM, VLD, CPSY, RECONF [detail] |
2010-01-27 16:20 |
Kanagawa |
Keio Univ (Hiyoshi Campus) |
A programmable optically reconfigurable gate array with a silver-halide holographic memory Shinya Kubota, Minoru Watanabe (Shizuoka Univ.) VLD2009-98 CPSY2009-80 RECONF2009-83 |
[more] |
VLD2009-98 CPSY2009-80 RECONF2009-83 pp.175-179 |