Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
RECONF, CPSY, VLD, IPSJ-SLDM [detail] |
2015-01-29 08:35 |
Kanagawa |
Hiyoshi Campus, Keio University |
Performance Acceleration of Document-Oriented Stores Using GPUs Shin Morishima, Hiroki Matsutani (Keio Univ.) VLD2014-113 CPSY2014-122 RECONF2014-46 |
[more] |
VLD2014-113 CPSY2014-122 RECONF2014-46 pp.1-6 |
RECONF, CPSY, VLD, IPSJ-SLDM [detail] |
2015-01-29 08:55 |
Kanagawa |
Hiyoshi Campus, Keio University |
Accelerating NOSQLs using FPGA NIC and In-Kernel Key-Value Cache Korechika Tamura, Ami Hayashi, Yuta Tokusashi, Hiroki Matsutani (Keio Univ.) VLD2014-114 CPSY2014-123 RECONF2014-47 |
(To be available after the conference date) [more] |
VLD2014-114 CPSY2014-123 RECONF2014-47 pp.7-12 |
RECONF, CPSY, VLD, IPSJ-SLDM [detail] |
2015-01-29 09:15 |
Kanagawa |
Hiyoshi Campus, Keio University |
An Online Outlier Detector for FPGA NICs Ami Hayashi, Yuta Tokusashi, Hiroki Matsutani (Keio Univ.) VLD2014-115 CPSY2014-124 RECONF2014-48 |
[more] |
VLD2014-115 CPSY2014-124 RECONF2014-48 pp.13-18 |
RECONF, CPSY, VLD, IPSJ-SLDM [detail] |
2015-01-29 09:35 |
Kanagawa |
Hiyoshi Campus, Keio University |
Turbo Boost Router: An On-Chip Router Supporting Deterministic and Adaptive Routings Natsuki Homma, Go Matsumura (Keio Univ.), Michihiro Koibuchi (NII), Hideharu Amano, Hiroki Matsutani (Keio Univ.) VLD2014-116 CPSY2014-125 RECONF2014-49 |
(To be available after the conference date) [more] |
VLD2014-116 CPSY2014-125 RECONF2014-49 pp.19-24 |
RECONF, CPSY, VLD, IPSJ-SLDM [detail] |
2015-01-29 09:55 |
Kanagawa |
Hiyoshi Campus, Keio University |
NoC Architecture with Priority-based Packet Overtaking and Resource Control Shuhei Otsuki, Keigo Mizotani, Masayoshi Takasu (Keio Univ.), Daiki Yamazaki (Sony), Nobuyuki Yamasaki (Keio Univ.) VLD2014-117 CPSY2014-126 RECONF2014-50 |
With the recent advances in semiconductor technology, many transistors have been integrated into a single chip and Chip-... [more] |
VLD2014-117 CPSY2014-126 RECONF2014-50 pp.25-30 |
RECONF, CPSY, VLD, IPSJ-SLDM [detail] |
2015-01-29 10:25 |
Kanagawa |
Hiyoshi Campus, Keio University |
Radiation tolerance of parallel configuration of optically reconfigurable gate arrays Hiroyuki Ito, Retsu Moriwaki, Minoru Watanabe (Shizuoka Univ.) VLD2014-118 CPSY2014-127 RECONF2014-51 |
[more] |
VLD2014-118 CPSY2014-127 RECONF2014-51 pp.31-34 |
RECONF, CPSY, VLD, IPSJ-SLDM [detail] |
2015-01-29 10:45 |
Kanagawa |
Hiyoshi Campus, Keio University |
Circuit Design and Valuation of Reconfigurable Logic Circuit. Junki Kato, Shigeyoshi Watanabe, Hiroshi Ninomiya, Manabu Kobayashi, Yasuyuki Miura (SIT) VLD2014-119 CPSY2014-128 RECONF2014-52 |
[more] |
VLD2014-119 CPSY2014-128 RECONF2014-52 pp.35-40 |
RECONF, CPSY, VLD, IPSJ-SLDM [detail] |
2015-01-29 11:05 |
Kanagawa |
Hiyoshi Campus, Keio University |
Exploring 3D FPGA Architectures to Minimize the Number of Inter-layer Connections Qian Zhao, Motoki Amagasaki, Masahiro Iida, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ.) VLD2014-120 CPSY2014-129 RECONF2014-53 |
The 3D IC technology is being researched to build better performance LSIs in a variety of applications when the process ... [more] |
VLD2014-120 CPSY2014-129 RECONF2014-53 pp.41-46 |
RECONF, CPSY, VLD, IPSJ-SLDM [detail] |
2015-01-29 12:45 |
Kanagawa |
Hiyoshi Campus, Keio University |
[Invited Talk]
Human Friendly Robot Based on Ontologies Takahira Yamaguchi (Keio Univ.) VLD2014-121 CPSY2014-130 RECONF2014-54 |
[more] |
VLD2014-121 CPSY2014-130 RECONF2014-54 p.47 |
RECONF, CPSY, VLD, IPSJ-SLDM [detail] |
2015-01-29 15:05 |
Kanagawa |
Hiyoshi Campus, Keio University |
An AWF Digital Spectrometer for a Radio Telescope Hiroki Nakahara (Ehime Univ.), Hiroyuki Nakanishi (Kagoshima Univ.), Kazumasa Iwai (NAOJ) VLD2014-122 CPSY2014-131 RECONF2014-55 |
A radio telescope analyzes radio frequency~(RF) received from celestial objects.
It consists of an antenna, a receiver,... [more] |
VLD2014-122 CPSY2014-131 RECONF2014-55 pp.67-72 |
RECONF, CPSY, VLD, IPSJ-SLDM [detail] |
2015-01-29 15:25 |
Kanagawa |
Hiyoshi Campus, Keio University |
Small Bandwidth Compression Hardware Exploited Distribution of Length of Prediction Residual Tomohiro Ueno, Ryo Ito, Kentaro Sano, Satoru Yamamoto (Tohoku Univ.) VLD2014-123 CPSY2014-132 RECONF2014-56 |
This paper shows a compact bandwidth compressor to increase the performance of numerical computation on FPGA. We must re... [more] |
VLD2014-123 CPSY2014-132 RECONF2014-56 pp.73-78 |
RECONF, CPSY, VLD, IPSJ-SLDM [detail] |
2015-01-29 15:45 |
Kanagawa |
Hiyoshi Campus, Keio University |
Inter-Cube Data-Exchanging for Custom Fluid Computing Machine Based on Building-Cube Method Tomoya Ueno, Tomohiro Ueno, Kentaro Sano, Satoru Yamamoto (Tohoku Univ.) VLD2014-124 CPSY2014-133 RECONF2014-57 |
In our research project, we have developed an FPGA-based custom computing machine for parallel fluid computation based o... [more] |
VLD2014-124 CPSY2014-133 RECONF2014-57 pp.79-84 |
RECONF, CPSY, VLD, IPSJ-SLDM [detail] |
2015-01-29 16:05 |
Kanagawa |
Hiyoshi Campus, Keio University |
FPGA Implementation of a High Time Resolution Signal Generation Circuit for PWM Shun Kashiwagi, Daiki Mitsutake, Hironobu Taniguchi, Yuichiro Shibata, Kiyoshi Oguri, Hidenori Maruta, Fujio Kurokawa (Nagasaki Univ.) VLD2014-125 CPSY2014-134 RECONF2014-58 |
Recently, high-frequency digitally controlled switching power supplies
have received increasing attention in the conte... [more] |
VLD2014-125 CPSY2014-134 RECONF2014-58 pp.85-90 |
RECONF, CPSY, VLD, IPSJ-SLDM [detail] |
2015-01-29 16:40 |
Kanagawa |
Hiyoshi Campus, Keio University |
Study on Clock Tree Delay Analysis Mechanism Goro Suzuki, Ryutaro Takeda (Kitakyushu Univ.) VLD2014-126 CPSY2014-135 RECONF2014-59 |
[more] |
VLD2014-126 CPSY2014-135 RECONF2014-59 pp.91-98 |
RECONF, CPSY, VLD, IPSJ-SLDM [detail] |
2015-01-29 17:00 |
Kanagawa |
Hiyoshi Campus, Keio University |
Temperature sensor applying Body Bias in Silicon-on-Thin-BOX Tsubasa Kosaka, Shohei Nakamura, Kimiyoshi Usami (S.I.T.) VLD2014-127 CPSY2014-136 RECONF2014-60 |
The performance advancement by the transistor scaling is blocked by increase of power consumption and process variation.... [more] |
VLD2014-127 CPSY2014-136 RECONF2014-60 pp.99-104 |
RECONF, CPSY, VLD, IPSJ-SLDM [detail] |
2015-01-29 17:20 |
Kanagawa |
Hiyoshi Campus, Keio University |
A Dual-mode Scheduling Strategy for Task Graphs with Data Parallelism Yang Liu, Lin Meng, Ittetsu Taniguchi, Hiroyuki Tomiyama (Ritsumeikan Univ.) VLD2014-128 CPSY2014-137 RECONF2014-61 |
[more] |
VLD2014-128 CPSY2014-137 RECONF2014-61 pp.105-109 |
RECONF, CPSY, VLD, IPSJ-SLDM [detail] |
2015-01-29 17:40 |
Kanagawa |
Hiyoshi Campus, Keio University |
Analyzing the Impacts of Simultaneous Supply and Threshold Voltage Tuning on Energy Dissipation in VLSI Circuits Toshihiro Takeshita, Shinichi Nishizawa, AKM Mahfuzul Islam, Tohru Ishihara, Hidetoshi Onodera (Kyoto Univ) VLD2014-129 CPSY2014-138 RECONF2014-62 |
Simultaneous supply and threshold voltage tuning has a strong impact on the energy reduction of LSI circuits. Therefore,... [more] |
VLD2014-129 CPSY2014-138 RECONF2014-62 pp.111-116 |
RECONF, CPSY, VLD, IPSJ-SLDM [detail] |
2015-01-29 18:00 |
Kanagawa |
Hiyoshi Campus, Keio University |
CF3: Test suite for arithmetic optimization of C compilers Yusuke Hibino, Nagisa Ishiura (KGU) VLD2014-130 CPSY2014-139 RECONF2014-63 |
This article presents a compiler test suite "CF3," which targets arithmetic optimization, especially constant folding, o... [more] |
VLD2014-130 CPSY2014-139 RECONF2014-63 pp.117-122 |
RECONF, CPSY, VLD, IPSJ-SLDM [detail] |
2015-01-30 08:30 |
Kanagawa |
Hiyoshi Campus, Keio University |
Discussion on power performance optimization for stream processing on an FPGA accelerator Kota Fukumoto, Koji Okina, Rie Soejima, Yuichiro Shibata, Kiyoshi Oguri (Nagasaki Univ.) VLD2014-131 CPSY2014-140 RECONF2014-64 |
[more] |
VLD2014-131 CPSY2014-140 RECONF2014-64 pp.123-128 |
RECONF, CPSY, VLD, IPSJ-SLDM [detail] |
2015-01-30 08:50 |
Kanagawa |
Hiyoshi Campus, Keio University |
A proposal of a stream image compression architecture using neural networks Kaoru Hamasaki, Yuichiro Shibata, Kiyoshi Oguri (Nagasaki Univ.) VLD2014-132 CPSY2014-141 RECONF2014-65 |
Real-time image processing systems based on an application-specific
streamed processing architecture configured on an ... [more] |
VLD2014-132 CPSY2014-141 RECONF2014-65 pp.129-132 |