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Technical Committee on Image Engineering (IE) (Searched in: 2012)
Search Results: Keywords 'from:2012-10-18 to:2012-10-18'
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| IE, SIP, ICD, VLD, IPSJ-SLDM [detail] | 2012-10-18 13:30 |
Iwate | Hotel Ruiz | Human Behavior Detection Using Direction Change Invariant Features of Cubic Higher Order Local Auto Correlation Takeyuki Ishii, Hitomi Murakami, Atsushi Koike (Seikei Univ.)  VLD2012-40 SIP2012-62 ICD2012-57 IE2012-64 |
In this paper, we propose a new method of feature homogenization to prevent changes in the features according to human s... [more] | VLD2012-40 SIP2012-62 ICD2012-57 IE2012-64 pp.1-6 |
| IE, SIP, ICD, VLD, IPSJ-SLDM [detail] | 2012-10-18 13:55 |
Iwate | Hotel Ruiz | Avoiding Error Magnification in Weighted Median Cut Quantization in Decoding Process
-- High Quality Data Compression of Sparse Histogram Images -- Toru Ikarashi, Masahiro Iwahashi (Nagaoka Univ. of Tech.), Hitoshi Kiya (Tokyo Metropolitan Univ.) VLD2012-41 SIP2012-63 ICD2012-58 IE2012-65 |
In this report, we propose a lossy data compression algorithm for a sparse histogram image signal. The bit depth of pixe... [more] | VLD2012-41 SIP2012-63 ICD2012-58 IE2012-65 pp.7-12 |
| IE, SIP, ICD, VLD, IPSJ-SLDM [detail] | 2012-10-18 14:20 |
Iwate | Hotel Ruiz | A Design of Hilbert Transformers using an L1 error criterion Ikuya Murakami, Naoyuki Aikawa (Tokyo Univ. of Science) VLD2012-42 SIP2012-64 ICD2012-59 IE2012-66 |
In this paper, we propose a design method of Hilbert Transformers using an $L_1$ error criterion. Conventional Hilbert T... [more] | VLD2012-42 SIP2012-64 ICD2012-59 IE2012-66 pp.13-18 |
| IE, SIP, ICD, VLD, IPSJ-SLDM [detail] | 2012-10-18 15:00 |
Iwate | Hotel Ruiz | A 16-gray-scale image recognition on a dynamically reconfigurable vision architecture Yuki Kamikubo, Minoru Watanabe, Shoji Kawahito (Shizuoka Univ.) VLD2012-43 SIP2012-65 ICD2012-60 IE2012-67 |
[more] | VLD2012-43 SIP2012-65 ICD2012-60 IE2012-67 pp.19-23 |
| IE, SIP, ICD, VLD, IPSJ-SLDM [detail] | 2012-10-18 15:25 |
Iwate | Hotel Ruiz | Learning of shade for beginners based on interactive pencil-drawing learning support system using tablet PC Akihiro Sawada, Masashi Kameda (Iwate City Univ.) VLD2012-44 SIP2012-66 ICD2012-61 IE2012-68 |
Pencil-drawing is the fundamental training method to study the painting such as sketch, watercolor or oil painting. In t... [more] | VLD2012-44 SIP2012-66 ICD2012-61 IE2012-68 pp.25-30 |
| IE, SIP, ICD, VLD, IPSJ-SLDM [detail] | 2012-10-18 16:00 |
Iwate | Hotel Ruiz | [Invited Talk]
Computing Technologies for Human-Centered Real-World Intelligent Systems Masanori Hariyama, Michitaka Kameyama (Tohoku Univ.) VLD2012-45 SIP2012-67 ICD2012-62 IE2012-69 |
[more] | VLD2012-45 SIP2012-67 ICD2012-62 IE2012-69 pp.31-33 |
| IE, SIP, ICD, VLD, IPSJ-SLDM [detail] | 2012-10-19 09:00 |
Iwate | Hotel Ruiz | Power consumption analysis of a mono instruction set computer architecture Hiroyuki Ito, Minoru Watanabe (Shizuoka Univ.) VLD2012-46 SIP2012-68 ICD2012-63 IE2012-70 |
[more] | VLD2012-46 SIP2012-68 ICD2012-63 IE2012-70 pp.35-38 |
| IE, SIP, ICD, VLD, IPSJ-SLDM [detail] | 2012-10-19 09:25 |
Iwate | Hotel Ruiz | Design of a Packet-Transfer-Based Dynamic Reconfigurable VLSI Processor for Reduction of a Configuration Memory Size Yoshichika Fujioka (Hachinohe Inst. of Tech.), Michitaka Kameyama (Tohoku Univ.) VLD2012-47 SIP2012-69 ICD2012-64 IE2012-71 |
Register-transfer-level packet routing scheme is proposed for intra-chip data transfer to make the size of configuration... [more] | VLD2012-47 SIP2012-69 ICD2012-64 IE2012-71 pp.39-44 |
| IE, SIP, ICD, VLD, IPSJ-SLDM [detail] | 2012-10-19 09:50 |
Iwate | Hotel Ruiz | Design of Stochastic Flash A/D Converter using a non-linearity calibration technique Shinya Yano, Hyunju Ham, Toshimasa Matsuoka, Jun Wang, Ikkyun Jo (Osaka Univ.) VLD2012-48 SIP2012-70 ICD2012-65 IE2012-72 |
[more] | VLD2012-48 SIP2012-70 ICD2012-65 IE2012-72 pp.45-48 |
| IE, SIP, ICD, VLD, IPSJ-SLDM [detail] | 2012-10-19 10:15 |
Iwate | Hotel Ruiz | A 9-bit 10MSps SAR ADC with Double Input Range for Supply Voltage Gong Chen, Yu Zhang, Qing Dong, Shigetoshi Nakatake (Univ. of Kitakyushu), Bo Yang, Jing Li (Design Algorithm Lab.) VLD2012-49 SIP2012-71 ICD2012-66 IE2012-73 |
This paper presents a pre-charge VCM-based method for 1.2V 9-bit 10MSps Successive Approximation Register (SAR) ADC. Th... [more] |
VLD2012-49 SIP2012-71 ICD2012-66 IE2012-73 pp.49-53 |
| IE, SIP, ICD, VLD, IPSJ-SLDM [detail] | 2012-10-19 11:00 |
Iwate | Hotel Ruiz | [Invited Talk]
Development of Heterogeneous Multi-Core SoC ViscontiTM2 for Image Recognition Applications Takashi Miyamori, Yasuki Tanabe, Moriyasu Banno (Toshiba) VLD2012-50 SIP2012-72 ICD2012-67 IE2012-74 |
Use of image recognition technologies in various products is rapidly expanding. For automotive applications, pedestrian ... [more] | VLD2012-50 SIP2012-72 ICD2012-67 IE2012-74 pp.55-58 |
| IE, SIP, ICD, VLD, IPSJ-SLDM [detail] | 2012-10-19 13:00 |
Iwate | Hotel Ruiz | Accelerator Architecture for Multi Scale Filter Operation Shinya Ueno, Gauthier Lovic Eric, Koji Inoue, Kazuaki Murakami (Kyushu Univ.) VLD2012-51 SIP2012-73 ICD2012-68 IE2012-75 |
Image recognition processing includes a number of filter operations which dominate the total execution time. Exploiting... [more] |
VLD2012-51 SIP2012-73 ICD2012-68 IE2012-75 pp.59-64 |
| IE, SIP, ICD, VLD, IPSJ-SLDM [detail] | 2012-10-19 13:25 |
Iwate | Hotel Ruiz | Load buffer with conversion capability from tiled data to raster data for motion search Takumi Inomata, Atsushi Tachino, Takahiro Sasaki, Kazuhiko Ohno, Toshio Kondo (Mie Univ.) VLD2012-52 SIP2012-74 ICD2012-69 IE2012-76 |
For smooth video encoding, it is essential to speed up the motion search, which consumes the most part of the processin... [more] | VLD2012-52 SIP2012-74 ICD2012-69 IE2012-76 pp.65-70 |
| IE, SIP, ICD, VLD, IPSJ-SLDM [detail] | 2012-10-19 13:50 |
Iwate | Hotel Ruiz | A Low Power CMOS Motion Estimation Processor Implementing Dynamic Voltage and Frequency Scaling (DVFS) and Adaptively Assigned Breaking-off Condition (A2BC) Motion Estimation Algorithm Tadayoshi Enomoto, Nobuaki Kobayashi (Chuo Univ) VLD2012-53 SIP2012-75 ICD2012-70 IE2012-77 |
A motion estimation (ME) processor was developed by employing dynamic voltage and frequency scaling (DVFS) technique to ... [more] | VLD2012-53 SIP2012-75 ICD2012-70 IE2012-77 pp.71-76 |
| IE, SIP, ICD, VLD, IPSJ-SLDM [detail] | 2012-10-19 14:30 |
Iwate | Hotel Ruiz | CMOS Op-amp Circuit Synthesis with Geometric Programming Yu Zhang, Qing Dong, Shigetoshi Nakatake (Univ. of Kitakyushu), Bo Yang, Jing Li (Design Algorithm Lab.) VLD2012-54 SIP2012-76 ICD2012-71 IE2012-78 |
This work presents a 6T SRAM design in nanometer process via geometric programming (GP). We adopt the transistor array (... [more] | VLD2012-54 SIP2012-76 ICD2012-71 IE2012-78 pp.77-82 |
| IE, SIP, ICD, VLD, IPSJ-SLDM [detail] | 2012-10-19 14:55 |
Iwate | Hotel Ruiz | Fast Estimation of Dynamic Delay Distribution Dai Akita, Kenta Ando (Osaka Univ.), Atsushi Takahashi (Tokyo Tech.) VLD2012-55 SIP2012-77 ICD2012-72 IE2012-79 |
As the improvement of digital circuits with fixed latency is about to reach its own limits, it is expected that variable... [more] | VLD2012-55 SIP2012-77 ICD2012-72 IE2012-79 pp.83-88 |
| IE, SIP, ICD, VLD, IPSJ-SLDM [detail] | 2012-10-19 15:20 |
Iwate | Hotel Ruiz | Reduction of array accesses with WAR dependencies Takayuki Ookawa, Kenshu Seto (Tokyo City Univ.) VLD2012-56 SIP2012-78 ICD2012-73 IE2012-80 |
[more] | VLD2012-56 SIP2012-78 ICD2012-73 IE2012-80 pp.89-94 |
| IE, SIP, ICD, VLD, IPSJ-SLDM [detail] | 2012-10-19 16:00 |
Iwate | Hotel Ruiz | Secure Scan Architecture Using State Dependent Scan Flip-Flop with Key-Based Configuration on RSA Circuit   Yuta Atobe, Youhua Shi, Masao Yanagisawa, Nozomu Togawa (Waseda Univ.) VLD2012-57 SIP2012-79 ICD2012-74 IE2012-81 |
Scan test is one of the useful design for testability techniques, which can detect circuit failure efficiently. However,... [more] | VLD2012-57 SIP2012-79 ICD2012-74 IE2012-81 pp.95-100 |
| IE, SIP, ICD, VLD, IPSJ-SLDM [detail] | 2012-10-19 16:25 |
Iwate | Hotel Ruiz | Write Reduction for Non-volatile Registers Using the Max-flow Min-cut Theorem Yudai Itoi, Shinji Kimura (Waseda Univ.) VLD2012-58 SIP2012-80 ICD2012-75 IE2012-82 |
Recently, the next generation non-volatile memory/register using magnetic tunnel junction elements has been paid attent... [more] |
VLD2012-58 SIP2012-80 ICD2012-75 IE2012-82 pp.101-106 |
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