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Technical Committee on Dependable Computing (DC) (Searched in: 2010)
Search Results: Keywords 'from:2010-11-29 to:2010-11-29'
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2010-12-01 10:10 |
Fukuoka | Kyushu University | Reliable Digital Signal Transmission Methodology
-- Its Application to the High Speed Bass Line -- Shohei Akita, Hiroki Shimada, Masami Ishiguro, Noriyuki Aibe, Moritoshi Yasunaga (Univ. of Tsukuba), Ikuo Yoshihara (Miyazaki Univ.)  CPSY2010-38 |
[more] | CPSY2010-38 pp.37-42 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2010-12-01 09:30 |
Fukuoka | Kyushu University | Power-Consumption-Evaluation on the Pattern-Recognition Machine Using Data-Direct-Implementation Approach Yusuke Sato, Moritoshi Yasunaga, Noriyuki Aibe (Univ. of Tsukuba) RECONF2010-44 |
[more] | RECONF2010-44 pp.31-36 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2010-12-01 09:50 |
Fukuoka | Kyushu University | Fabrication in Low Power Process and Evaluation of Power Reconfigurable Field Programmable Gate Array Masakazu Hioki (AIST), Takashi Kawanami (KIT), Yohei Matsumoto (TUMSAT), Toshiyuki Tsutsumi (Meiji Univ.), Tadashi Nakagawa, Toshihiro Sekigawa, Hanpei Koike (AIST) RECONF2010-45 |
Flex Power FPGA that is FPGA with power reconfigurability aims at the reduction of static power. The reduction of off cu... [more] | RECONF2010-45 pp.37-42 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2010-12-01 10:10 |
Fukuoka | Kyushu University | Magnetic Field Measurement for Side-channel Analysis Environment Toshihiro Katashita, Yohei Hori, Akashi Satoh (AIST) RECONF2010-46 |
Cryptography used widely in electronic products is evaluated in terms of computationally-secure, however there is vulner... [more] | RECONF2010-46 pp.43-48 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2010-12-01 10:45 |
Fukuoka | Kyushu University | An Effective Processing Method for Parallel Loops on FPGA with PCI-Express Koichi Araki, Yukinori Sato, Yasushi Inoguchi (JAIST) RECONF2010-47 |
As FPGAs with a PCI-Express Interface appear in the market, the data transter speed between FPGA and other units, such a... [more] | RECONF2010-47 pp.49-54 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2010-12-01 11:05 |
Fukuoka | Kyushu University | A study of the success rate of MIA under various probability density function estimations Yohei Hori (AIST), Takahiro Yoshida (Aoyama Univ.), Toshihiro Katashita, Akashi Satoh (AIST) RECONF2010-48 |
The pfrobability density function (PDF) of voltage of AES hardware module is estimated in various ways and applied to ... [more] |
RECONF2010-48 pp.55-60 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2010-12-01 11:25 |
Fukuoka | Kyushu University | Performance Evaluation for PUF-based Authentication Systems with Shift Post-processing Hyunho Kang, Yohei Hori, Toshihiro Katashita, Akashi Satoh (AIST) RECONF2010-49 |
A physical unclonable function (PUF) is a physical system with a device manufacturing variations and could be useful for... [more] | RECONF2010-49 pp.61-64 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2010-12-01 09:10 |
Fukuoka | Kyushu University | SREEP: A Tool for Secure Scan Design Using Shift Register Equivalents Katsuya Fujiwara (Akita Univ.), Hideo Fujiwara (NAIST), Hideo Tamamoto (Akita Univ.) VLD2010-72 DC2010-39 |
[more] | VLD2010-72 DC2010-39 pp.107-112 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2010-12-01 09:50 |
Fukuoka | Kyushu University | Fault-Injection using Virtualized Environment for Validating Automotive Systems Yasuhiro Ito (Hitachi.), Yohei Nakata, Hiroshi Kawaguchi (Kobe Univ.), Masahiko Yoshimoto (Kobe Univ./JST), Yasuo Sugure, Shigeru Oho (Hitachi.) VLD2010-73 DC2010-40 |
Fault Injection System: a system level co-simulation environment with fault-injection in memory access was developed. It... [more] | VLD2010-73 DC2010-40 pp.119-123 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2010-12-01 10:10 |
Fukuoka | Kyushu University | Evaluation and Verification of Dependable Processor Architecture Using System-Level Fault-Injection Scheme Yohei Nakata (Kobe Univ.), Yasuhiro Ito, Yasuo Sugure, Shigeru Oho (Hitachi Ltd.), Hiroshi Kawaguchi (Kobe Univ.), Masahiko Yoshimoto (Kobe Univ./JST) VLD2010-74 DC2010-41 |
We develop a fault case generator that can generate memory failures in aprocessor-in-the-loop simulation. The fault inje... [more] | VLD2010-74 DC2010-41 pp.125-130 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2010-12-01 10:45 |
Fukuoka | Kyushu University | ILP Approach to Extended Ordered Coloring for Skew Adjustability-Aware Resource Binding Mineo Kaneko (JAIST) VLD2010-75 DC2010-42 |
[more] | VLD2010-75 DC2010-42 pp.131-136 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2010-12-01 11:25 |
Fukuoka | Kyushu University | A Sequential Test Generation Method and a Binding Method for Testability Using Behavioral Description Ryoichi Inoue, Hiroaki Fujiwara, Toshinori Hosokawa (Nihon Univ.), Hideo Fujiwara (NAIST) VLD2010-76 DC2010-43 |
Although many works on test generation algorithms for sequential circuits have been reported so far, it is still very ha... [more] | VLD2010-76 DC2010-43 pp.143-148 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2010-12-01 13:15 |
Fukuoka | Kyushu University | [Invited Talk]
Monolithic 3D-FPGA with TFT SRAM over 90nm 9 layer Cu CMOS Tatasuya Naito, Tatsuya Ishida (Toshiba), Takeshi Onoduka (Covalent Materials), Masahito Nishigoori, Takeo Nakayama, Yoshihiro Ueno, Yasumi Ishimoto, Akihiro Suzuki, Chung Weicheng (Toshiba), Raminda Madurawe (readyASIC), Sheldon Wu (China International Intellectual Property Services), Shu Ikeda (tei Solutions), Hisato Oyamatsu (Toshiba) RECONF2010-50 |
[more] | RECONF2010-50 pp.65-69 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2010-12-01 14:10 |
Fukuoka | Kyushu University | An FPGA Implementation of Face Detection Recognition System for automobile using Impulse C Takaaki Miyajima (Keio Univ.), Masatoshi Arai (Calsonic), Hideharu Amano (Keio Univ.) RECONF2010-51 |
Since inattentive driving occupies $15\%$ of the cause of automobile accident, many companies are developing various sys... [more] | RECONF2010-51 pp.71-76 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2010-12-01 14:30 |
Fukuoka | Kyushu University | FPGA Accelaration Default Intensity Model Takaaki Yokoyama, Hideharu Amano (Keio Univ.) RECONF2010-52 |
[more] | RECONF2010-52 pp.77-82 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2010-12-01 13:15 |
Fukuoka | Kyushu University | Adjacent Insertion and Its Effectiveness in Code-Based 3-D Placement Shin Uesugi, Mineo Kaneko (JAIST) VLD2010-77 DC2010-44 |
Three Dimensional (3D) cuboid placement can be considered as a mathematical background of several practical problems suc... [more] | VLD2010-77 DC2010-44 pp.149-154 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2010-12-01 13:35 |
Fukuoka | Kyushu University | On pruning rules in exact algorithms for the minimum rectilinear Steiner arborescence problem Masayuki Nagase, Toshihiko Takahashi (Niigat Univ.) VLD2010-78 DC2010-45 |
[more] | VLD2010-78 DC2010-45 pp.155-159 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2010-12-01 13:55 |
Fukuoka | Kyushu University | Analysis of Channel Decomposition for Structured Analog Layout and Low-power Applications Bo Yang, Qing Dong, Jing Li, Shigetoshi Nakatake (Univ. of Kitakyushu) VLD2010-79 DC2010-46 |
[more] | VLD2010-79 DC2010-46 pp.161-166 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2010-12-01 14:15 |
Fukuoka | Kyushu University | Develop A Clock Tree Generator into Open-source CAD System. Takuya Higuchi, Jun'ichiro Ogane, Naohiko Shimizu (Tokai Univ.) VLD2010-80 DC2010-47 |
We developed the LSI design methodology with using NSL which is a high-level hardware description language, and Allianc... [more] |
VLD2010-80 DC2010-47 pp.167-172 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2010-12-01 14:50 |
Fukuoka | Kyushu University | Optimal adder architecture in ultra low voltage domain Nao Konishi, Masaru Kudo, Kimiyoshi Usami (Shibaura Inst. Tech.) VLD2010-81 DC2010-48 |
Circuit performance is evaluated for several adder architectures with wiring capacitance extracted from layout at 65nm p... [more] | VLD2010-81 DC2010-48 pp.173-178 |
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