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Technical Committee on Dependable Computing (DC) (Searched in: 2010)
Search Results: Keywords 'from:2010-11-29 to:2010-11-29'
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2010-11-30 11:05 |
Fukuoka | Kyushu University | [Invited Talk]
A wafer-level system integration technology for heterogeneous devices with pseudo-SoC Hiroshi Yamada, Yutaka Onozuka, Atsuko Iida, Kazuhiko Itaya, Hideyuki Funaki (Toshiba R&D Center)  CPM2010-135 ICD2010-94 |
A wafer level system integration technology for heterogeneous devices has been developed by applying pseudo-SOC. The ... [more] |
CPM2010-135 ICD2010-94 pp.67-72 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2010-11-30 09:30 |
Fukuoka | Kyushu University | Speeding-up Exact and Fast L1 Cache Configuration Simulation based on FIFO Replacement Policy Masashi Tawada, Masao Yanagisawa, Tatsuo Ohtsuki, Nozomu Togawa (Waseda Univ.) VLD2010-64 DC2010-31 |
The number of sets, block size and associativity determine processor's cache configuration. Particularly in embedded sys... [more] | VLD2010-64 DC2010-31 pp.55-60 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2010-11-30 09:50 |
Fukuoka | Kyushu University | Energy Aware Instruction Scheduling for Fine Grained Power Gated VLIW Processors Ittetsu Taniguchi, Mitsuya Uchida, Hiroyuki Tomiyama, Masahiro Fukui (Ritsumeikan Univ.) VLD2010-65 DC2010-32 |
Reducing energy consumption is a crucial for the embedded system design, and especially, the leakage energy reduction is... [more] | VLD2010-65 DC2010-32 pp.61-66 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2010-11-30 10:10 |
Fukuoka | Kyushu University | A study of high-performance asynchronous network-on-chip focused on bias of packets transfer routes Satoshi Takeyasu, Masashi Imai, Hiroshi Nakamura (Tokyo Univ.) VLD2010-66 DC2010-33 |
GALS-NoC is recently paid attention. Beside, NoC have commonly bias of packets transfer routes by regularity of network ... [more] | VLD2010-66 DC2010-33 pp.67-72 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2010-11-30 10:45 |
Fukuoka | Kyushu University | FPGA design and test methodology for communication frame processinng Ritsu Kusaba, Kenji Kawai, Sadayuki Yasuda, Satoshi Shigematsu, Mamoru Nakanishi, Masami Urano (NTT) VLD2010-67 DC2010-34 |
For large-scale and high-speed frame processing on a ＦＰＧＡ board, we propose a new design method based on the property of... [more] | VLD2010-67 DC2010-34 pp.73-78 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2010-11-30 11:05 |
Fukuoka | Kyushu University | Evaluation of FPGA Implementation Techniques for High-Performance SoC Prototypes Hideo Tanida (Univ. of Tokyo), Hiroaki Yoshida, Masahiro Fujita (Univ. of Tokyo/JST) VLD2010-68 DC2010-35 |
With the increasing scale and shrinking time-to-market of SoC systems, prototype implementations of SoCs on FPGAs are co... [more] | VLD2010-68 DC2010-35 pp.79-84 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2010-11-30 13:15 |
Fukuoka | Kyushu University | A case study of the effective value range analysis for Behavioral synthesis Kenji Tomonaga, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ.) CPSY2010-32 |
The digital circuit becomes more complex and larger scale recently, and behavioral synthesis that use behavioral descri... [more] |
CPSY2010-32 pp.1-6 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2010-11-30 13:35 |
Fukuoka | Kyushu University | Examination of the virtual wiring for an ASIC emulator using high-speed serial communication Toshio Yabuta, Yoshihiro Ichinomiya, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ.) CPSY2010-33 |
Examination of the virtual wiring for an ASIC emulator using high-speed serial communication [more] | CPSY2010-33 pp.7-12 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2010-11-30 13:55 |
Fukuoka | Kyushu University | A Router Architecture for Priority-Aware On-Chip Networks Takuma Kogo, Nobuyuki Yamasaki (Keio Univ) CPSY2010-34 |
[more] | CPSY2010-34 pp.13-18 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2010-11-30 14:15 |
Fukuoka | Kyushu University | A discussion on calculating eigenvalues of real symmetric tridiagonal matrices on a GPU Kohei Matsunobu, Keisuke Dohi, Yuichiro Shibata, Kiyoshi Oguri (Nagasaki Univ) CPSY2010-35 |
While GPUs are attracting attention as an accelerator in wide-ranged application areas, compatibility between the archit... [more] | CPSY2010-35 pp.19-24 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2010-11-30 13:15 |
Fukuoka | Kyushu University | Circuit Generation using High-Level Synthesis Tool in Reconfigurable HPC System Based on FPGA Arrays Kenichi Takahashi, Jiang Li, Hiroki Isogai, Hiroki Banba, Hakaru Tamukoh, Masatoshi Sekine (TUAT) RECONF2010-39 |
In recent years, HPC system architectures comprised of GPUs or FPGAs are becoming common. We propose a Reconfigurable HP... [more] | RECONF2010-39 pp.1-6 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2010-11-30 13:35 |
Fukuoka | Kyushu University | OS Functions for a Distributed FPGA Cluster System using Ethernet Akira Kojima, Takahiro Kajiyama, Tetsuo Hironaka (Hiroshima City Univ.) RECONF2010-40 |
[more] | RECONF2010-40 pp.7-12 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2010-11-30 13:55 |
Fukuoka | Kyushu University | On a Prefetching Heterogeneous MDD Machine Hiroki Nakahara, Tsutomu Sasao, Munehiro Matsuura (KIT) RECONF2010-41 |
This paper shows a heterogeneous multi-valued decision diagram machine~(HMDDM). First, we introduce a standard heteroge... [more] |
RECONF2010-41 pp.13-18 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2010-11-30 14:15 |
Fukuoka | Kyushu University | An FPGA Implementation of CRC Slicing-by-N algorithms Amila Akagic, Hideharu Amano (Keio Univ.) RECONF2010-42 |
Cyclic Redundancy Check (CRC) is an error detection scheme that detects corruption of digital content during data transm... [more] | RECONF2010-42 pp.19-24 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2010-11-30 14:35 |
Fukuoka | Kyushu University | A case study of efficient task scheduling for FPGA-based partially reconfigurable systems Yoshiaki Tsutsumi, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ.) RECONF2010-43 |
Dynamic Recon gurable system is the system that can build any function with recon gurable device such as FPGA (Field Pro... [more] | RECONF2010-43 pp.25-30 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2010-11-30 13:15 |
Fukuoka | Kyushu University | [Invited Talk]
Paper Writing Guide for International Conferences
-- Implications in VLSI design methodology field -- Masanori Hashimoto (Osaka Univ.) VLD2010-69 DC2010-36 |
This talk discusses how to write a technical paper that is likely to be accepted for international conferences on the ba... [more] | VLD2010-69 DC2010-36 p.91 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2010-11-30 14:15 |
Fukuoka | Kyushu University | Accurate Delay Analysis Method of Power-Gated Circuit Seidai Takeda, Kim Kyundong, Hiroshi Nakamura (Univ. of Tokyo), Kimiyoshi Usami (Shibaura Inst. of Tech.) VLD2010-70 DC2010-37 |
We present a noble delay computation methodology for cluster-based power-gated circuit. Our scheme can compute circuit d... [more] | VLD2010-70 DC2010-37 pp.93-98 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2010-11-30 17:15 |
Fukuoka | Kyushu University | [Invited Talk]
Photonic-electronic Convergence Technology Based on Silicon
-- Integration of photomic and electric circuits utilizing Siliconphotonics -- Seiichi Itabashi, Tai Tsuchizawa, Koji Yamada, Toshifumi Watanabe, Hiroyuki Shinojima, Hidetaka Nishi, Rei Takahashi (NTT Corp.), Kazumi Wada, Yasuhiko Ishikawa (Univ. of Tokyo.) VLD2010-71 DC2010-38 |
Photonic-electronic convergence technology based on silicon is presented. Siliconphotonics technology which is aiming at... [more] | VLD2010-71 DC2010-38 pp.105-106 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2010-12-01 09:30 |
Fukuoka | Kyushu University | A Study of Comparison between In-order and Out-of-order Processor for Many-core Processor Era Takefumi Miyoshi, Hidetsugu Irie, Yuuki Matsumura, Tsutomu Yoshinaga (UEC) CPSY2010-36 |
[more] | CPSY2010-36 pp.25-30 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2010-12-01 09:50 |
Fukuoka | Kyushu University | Preliminary Evaluation of Automatic Thread-Level Parallelization using Binary-Level Variable Analysis Takashi Shiroto, Kanemitsu Ootsu, Takashi Yokota, Takanobu Baba (Utsunomiya Univ.) CPSY2010-37 |
Recently, the multi-core processors are widely available. For effective utilization of the performance of multi-core pr... [more] |
CPSY2010-37 pp.31-36 |
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