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Technical Committee on Computer Systems (CPSY) (Searched in: 2004)
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Search Results: Keywords 'from:2005-01-25 to:2005-01-25'
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| [Go to Official CPSY Homepage] |
| Search Results: Conference Papers |
| Conference Papers (Available on Advance Programs) (Sort by: Date Ascending) |
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| Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
| CPSY, VLD, IPSJ-SLDM |
2005-01-26
14:10 |
Kanagawa |
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Performance Evaluation of Speculative Thread Execution in the Single-Chip Multiprocessor SKY
Akio Kamimurai, Ryotaro Kobayashi, Hideki Ando, Toshio Shimada (Nagoya Univ.) |
We have proposed multi-processor architecture, called SKY, which efficiently executes multiple threads in parallel. In p... [more] |
VLD2004-117 CPSY2004-83
pp.43-48 |
| CPSY, VLD, IPSJ-SLDM |
2005-01-26
14:40 |
Kanagawa |
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ASIP Architecture for Real-Time Graphical Effect Acceleration
Tatsuhiro Yoshimura, Keishi Sakanushi, Yoshinori Takeuchi, Masaharu Imai (Osaka Univ.) |
Graphical effect processing realizes a variety of
visual representation.
In this paper, we propose an ASIP architectur... [more] |
VLD2004-118 CPSY2004-84
pp.49-54 |
| CPSY, VLD, IPSJ-SLDM |
2005-01-26
15:10 |
Kanagawa |
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Extraction of Instruction Latency from Cycle-True Processor Models
Yusuke Hiraoka, Nagisa Ishiura (Kwansei Gakuin Univ.), Masaharu Imai (Osaka Univ) |
[more] |
VLD2004-119 CPSY2004-85
pp.55-60 |
| CPSY, VLD, IPSJ-SLDM |
2005-01-26
15:40 |
Kanagawa |
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Instruction Pattern Generation for Retargetable Compiler
Atsushi Kishimoto, Nagisa Ishiura, Yuuki Masui (Kwansei Gakuin Univ.), Masaharu Imai (Osaka Univ.) |
[more] |
VLD2004-120 CPSY2004-86
pp.61-66 |
| CPSY, VLD, IPSJ-SLDM |
2005-01-26
16:20 |
Kanagawa |
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Proposal and Implementation of Framework for Self-reproductive applications on PCA
Tomoki Kamiyama, Keigo Kurata, Yousuke Ikehata, Junji Kitamichi, Kenichi Kuroda (Univ.Aizu) |
[more] |
VLD2004-121 CPSY2004-87
pp.67-72 |
| CPSY, VLD, IPSJ-SLDM |
2005-01-26
16:50 |
Kanagawa |
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A Design of AES Encryption Circuit with 128-bit keys Using Look-Up Table Ring
Hui Qin, Tsutomu Sasao (Kyushu Inst. of Tech.), Yukihiro Iguchi (Meiji Univ.) |
This paper presents a new architecture for the AES encryption. The key technique is the PPR architecture, which is suita... [more] |
VLD2004-122 CPSY2004-88
pp.73-78 |
| CPSY, VLD, IPSJ-SLDM |
2005-01-26
17:20 |
Kanagawa |
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Architecture of RNS to Mixed-Radix Number Converter Using Signed-Digit Number Arithmetic
Yumi Ogawa, Shuangching Chen, Shugang Wei (Gunma Univ.) |
By introducing a signed-digit(SD) number arithmetic into a residue number system (RNS), arithmetic operations can be per... [more] |
VLD2004-123 CPSY2004-89
pp.79-84 |
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