| Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
| ICD |
2004-12-16
10:00 |
Hiroshima |
|
Dynamic-Vth, Dual-Power-Supply SRAM Cell Using D2G-SOI for Low-Power SoC Application
Masanao Yamaoka, Kenichi Osada, Kiyoo Itoh, Ryuta Tsuchiya, Takayuki Kawahara (Hitachi, Ltd.) |
We developped two SRAM memory cells suitable for low-power SoC. The memory cells are composed of new FD-SOI transistors,... [more] |
ICD2004-183
pp.1-5 |
| ICD |
2004-12-16
10:30 |
Hiroshima |
|
A Dynamic SDRAM-Mode Control Scheme for Low-Power Systems
Seiji Miura, Kazushige Ayukawa (Hitachi,Ltd) |
A dynamic SDRAM-mode-control scheme for low-power systems was developed and tested. The scheme is based on two dynamic c... [more] |
ICD2004-184
pp.7-11 |
| ICD |
2004-12-16
11:00 |
Hiroshima |
|
Banked Multiported Register File for Highly Parallel Processors
Ken-ichi Aoyama, Tetsuya Sueyoshi, Koh Johguchi, Moto Maeda, Tetsushi Koide, Hans Juergen Mattausch, Tetsuo Hironaka (Hiroshima Univ.) |
[more] |
ICD2004-185
pp.13-18 |
| ICD |
2004-12-16
11:30 |
Hiroshima |
|
Architecture of a Multi-Context FPGA Using a Reconfigurable Context Memory
Masanori Hariyama, Wei Sheng CHONG, Michitaka Kameyama (Tohoku Univ.) |
[more] |
ICD2004-186
pp.19-23 |
| ICD |
2004-12-16
13:00 |
Hiroshima |
|
[Invited Talk]
DRAM Architecture Trend
-- DRAM Architecture Variation in relation to System Requirements --
Manabu Ando (Elpida) |
[more] |
ICD2004-187
pp.25-30 |
| ICD |
2004-12-16
14:00 |
Hiroshima |
|
[Invited Talk]
Inter/Intra-Chip Wireless Interconnection for VLSI using Integrated Antennas
Takamaro Kikkawa (Hiroshima Univ.) |
[more] |
ICD2004-188
pp.31-35 |
| ICD |
2004-12-16
15:15 |
Hiroshima |
|
At-Speed Self-Test LSI for High-Speed Serial Link
Mamoru Sasaki (Hiroshima Univ.), Kenji Ishimatu (Kumamoto Industrial Research Institute), Morimichi Kanazawa, Shinichi Jintate (Renesas), Hiroyuki Nagahata (Sanyu) |
[more] |
ICD2004-189
pp.37-42 |
| ICD |
2004-12-16
15:45 |
Hiroshima |
|
A multi-chip vision system with a PWM-based Line parallel interconnection
Seiji Kameda, Atsushi Iwata (Hiroshima Univ.) |
[more] |
ICD2004-190
pp.43-47 |
| ICD |
2004-12-16
16:15 |
Hiroshima |
|
Robot Vision System with Parallel Reconfigurable Image Processor
Takeaki Sugimura, Jun Deguchi, Yuta Konishi, Yoshihiro Nakatani, Takafumi Fukushima, Atsushi Konno, Hiroyuki Kurino, Masaru Uchiyama, Mitsumasa Koyanagi (Tohoku Univ.) |
[more] |
ICD2004-191
pp.49-54 |
| ICD |
2004-12-16
16:45 |
Hiroshima |
|
A design of architecture and circuit of data-mining processor
Akinori Kanasugi, Masao Ohkura, Mitsuhiro Matsumoto (Tokyo Denki Univ.) |
This paper describes the architecture and circuit of rough set processor. The theory of rough sets has a lot of applicat... [more] |
ICD2004-192
pp.55-58 |
| ICD |
2004-12-17
10:00 |
Hiroshima |
|
A 1V supply successive approximation ADC with rail-to-rail input voltage range
Yoshihiro Masui, Miho Akagi, Kouichiro Enrin, Takeshi Yoshida, Mamoru Sasaki, Atsushi Iwata (Hiroshima Univ) |
An analog-to-digital converter (ADC) is an essential circuit block for the mixed-signal system-on-chip (SoC), which inte... [more] |
ICD2004-193
pp.1-5 |
| ICD |
2004-12-17
10:30 |
Hiroshima |
|
CMOS Frequency Divider Operating beyond the Upper Frequency Limit of MOSFETs
Ken Yamamoto, Minoru Fujishima (Tokyo Univ.) |
[more] |
ICD2004-194
pp.7-12 |
| ICD |
2004-12-17
11:00 |
Hiroshima |
|
0.13-μm CMOS、10-Gbps、16:1 Low-Power Multiplexer
Ryouta Isozaki, Tadayoshi Enomoto (Chuo Univ.) |
[more] |
ICD2004-195
pp.13-18 |
| ICD |
2004-12-17
11:30 |
Hiroshima |
|
The Power Reduction of Execution Circuits with Dynamic Power Control Method
Sinji Itano, Keikiti Tamaru (OUS) |
The increase of leakage current in the deep submicron MOSFET circuits becomes the serious problems. In this paper the lo... [more] |
ICD2004-196
pp.19-24 |
| ICD |
2004-12-17
13:00 |
Hiroshima |
|
[Invited Talk]
Self-Timed Data-Driven Processors and their Applications
Makoto Iwata, Hiroaki Terada (Kochi Univ. of Tech.) |
Pipeline structure is considered to be the best solution to overcome LSI design limitation constraints by allowing a div... [more] |
ICD2004-197
pp.25-30 |
| ICD |
2004-12-17
14:00 |
Hiroshima |
|
Multiple-Valued Current-Mode Differential-Pair Circuit for a High-Speep/High-Reliability Arithmetic VLSI System
Akira Mochizuki, Takeshi Kitamura, Takahiro Hanyu (Tohoku Univ.) |
[more] |
ICD2004-198
pp.31-36 |
| ICD |
2004-12-17
14:30 |
Hiroshima |
|
Design and Evaluation of Fine-Grain Field Programmable VLSI Based on Multiple-Valued Source-Coupled Logic
Haque Mohammad Munirul, Michitaka Kameyama (Tohoku Univ.) |
[more] |
ICD2004-199
pp.37-40 |