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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| ED, LQE, CPM | 2018-11-29 14:40 |
Aichi | Nagoya Inst. tech. | Scanning internal photoemission microscopy measurements of n-GaN Schottky contacts under applying voltage Kenji Shiojima, Masataka Maeda (Univ. of Fukui), Tomoyoshi Mishima (Hosei Univ.)  ED2018-36 CPM2018-70 LQE2018-90 |
We applied scanning internal photoemission microscopy (SIPM) method to characterize the initial stage of the degradation... [more] | ED2018-36 CPM2018-70 LQE2018-90 pp.17-20 |
| ED | 2018-10-24 14:25 |
Tokyo | Effects of discharge gas species (Ar, Kr) on fabrication of Spindt type emitter cathode using high power pulsed magnetron sputtering Hyuga Taniguchi, Kei Oya, Takeo Nakano (Seikei Univ.), Masayoshi Nagao, Hisashi Ohsaki, Katsuhisa Murakami (AIST) ED2018-27 |
Spindt-type emitter is one of the vacuum electron sources prepared by semiconductor manufacturing technologies. On its f... [more] | ED2018-27 pp.5-8 |
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| CPM, LQE, ED | 2016-12-12 13:25 |
Kyoto | Kyoto University | Observation of Initial Stage of Degradation in Au/Ni/n-GaN Schottky Diodes Using Scanning Internal Photoemission Microscopy Kenji Shiojima, Shingo Murase, Masataka Maeda (Univ. of Fukui), Tomoyoshi Mishima (Hosei Univ.) ED2016-58 CPM2016-91 LQE2016-74 |
We characterized an early stage of interface degradation by high-reverse-voltage application in Au/Ni/n-GaN Schottky con... [more] | ED2016-58 CPM2016-91 LQE2016-74 pp.5-8 |
| VLD, DC, CPSY, RECONF, CPM, ICD, IE (Joint) [detail] |
2016-11-29 09:00 |
Osaka | Ritsumeikan University, Osaka Ibaraki Campus | Measurement of Vth Variation due to STI Stress and Inverse Narrow Channel Effect at Ultra-Low Voltage in a Variability-Suppressed Process Yasuhiro Ogasahara, Hanpei Koike (AIST) CPM2016-76 ICD2016-37 IE2016-71 |
This paper demonstrates notable impact of Vth shift due to STI-induced dopant redistribution on ultra-low voltage design... [more] | CPM2016-76 ICD2016-37 IE2016-71 pp.1-6 |
| EE, WPT (Joint) |
2016-10-07 10:50 |
Kyoto | Sub Optimal Operation of Voltage Dividing Class E Amplifier in Load Variation Katsutoshi Hirayama, Takuya Shirakawa (Nagasaki Univ.), Tadashi Suetsugu (Fukuoka Univ.), Hidenori Maruta, Fujio Kurokawa (Nagasaki Univ.) EE2016-25 |
The purpose of this paper is to present the class E amplifier connecting the transistors in series, and some of connecte... [more] | EE2016-25 pp.37-41 |
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| EE, IEE-SPC | 2016-07-14 14:45 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | On a Study of Voltage Dividing Class E Amplifier Katsutoshi Hirayama, Yudai Furukawa, Takuya Shirakawa (Nagasaki Univ.), Tadashi Suetsugu (Fukuoka Univ.), Hidenori Maruta, Fujio Kurokawa (Nagasaki Univ.) EE2016-10 |
The purpose of this paper is to present the splitting of peak switch voltage by series connected transistors in the clas... [more] | EE2016-10 pp.49-52 |
| SDM | 2015-01-27 15:30 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | [Invited Talk]
Accurate Prediction of PBTI Lifetime in N-type Fin-Channel High-k Tunnel FETs Wataru Mizubayashi, Takahiro Mori, Koichi Fukuda, Yongxun Liu, Takashi Matsukawa, Yuki Ishikawa, Kazuhiko Endo, Shinichi Ohuchi, Junichi Tsukada, Hiromi Yamauchi, Yukinori Morita, Shinji Migita, Hiroyuki Ota, Meishoku Masahara (AIST) SDM2014-143 |
The positive bias temperature instability (PBTI) characteristics for n-type fin-channel tunnel FETs (TFETs) with high-k ... [more] | SDM2014-143 pp.33-36 |
| EE | 2013-10-10 16:00 |
Hokkaido | Hokkaido University Clark Memorial Student Center | A Novel LLC Converter Combined with Switched Capacitor for High Voltage Applications Kou Mitsui, Terukazu Sato, Kimihiro Nishijima, Takashi Nabeshima (Oita Univ.) EE2013-21 |
This paper presents a novel LLC converter combined with switched capacitor for high voltage applications. The proposed c... [more] | EE2013-21 pp.5-9 |
| EE | 2013-10-10 16:30 |
Hokkaido | Hokkaido University Clark Memorial Student Center | A Novel Voltage Stress Suppression Method Using Coupled Transformer for Phase Shift Controlled Converter Shohei Miyata, Terukazu Sato, Kimihiro Nishijima, Takashi Nabeshima (Oita Univ.) EE2013-22 |
A new method to suppress voltage stress of switches and transformers is proposed for phase shift controlled dc-dc conver... [more] | EE2013-22 pp.11-15 |
| VLD, IPSJ-SLDM | 2013-05-16 09:00 |
Fukuoka | Kitakyushu International Conference Center | Performance-driven SRAM Macro Design with Parameterized Cell Considering Layout-dependent Effects Yu Zhang, Shigetoshi Nakatake (Univ. of Kitakyushu) VLD2013-1 |
In nano-scale process, shallow trench isolation (STI) stress and well proximity effect (WPE) affect the threshold volta... [more] |
VLD2013-1 pp.1-6 |
| ICD, SDM | 2012-08-02 10:00 |
Hokkaido | Sapporo Center for Gender Equality, Sapporo, Hokkaido | Self-Improvement of Cell Stability in SRAM by Post Fabrication Technique Anil Kumar, Takuya Saraya (Univ. of Tokyo), Shinji Miyano (STARC), Toshiro Hiramoto (Univ. of Tokyo) SDM2012-65 ICD2012-33 |
The post fabrication technique for self-improvement of SRAM cell stability is validated by experiment using 1k DMA SRAM ... [more] | SDM2012-65 ICD2012-33 pp.13-16 |
| ICD | 2012-04-24 14:50 |
Iwate | Seion-so, Tsunagi Hot Spring (Iwate) | Device-Conscious Circuit Designs for 0.5-V High-Speed Nanoscale CMOS LSIs Akira Kotabe, Kiyoo Itoh, Riichiro Takemura, Ryuta Tsuchiya (Hitachi), Masashi Horiguchi (Renesas) ICD2012-15 |
The feasibility of 0.5-V memory-rich nanoscale CMOS LSIs was studied. First, nanoscale fully-depleted MOSFETs (FD MOS) a... [more] | ICD2012-15 pp.79-84 |
| EE | 2011-11-18 10:30 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | Inductance Design Method for Boost Converter with Voltage Clamp Function Ikuro Suga, Yoshihiro Takeshima (Melco), Fujio Kurokawa (Nagasaki Univ.) EE2011-24 |
This paper presents a high efficiency boost converter with voltage clamp function. In the converter, a theoretical analy... [more] | EE2011-24 pp.1-6 |
| EE | 2010-01-22 13:00 |
Fukuoka | Experimental Verification of A Voltage clamp ZVS-PWM Bidirectional DC-DC Converter Masahiro Kitagawa, Koji Fujiwara, Yoshiyuki Ishihara (Doshisha Univ.), Masashi Ogura, Yoshifumi Minowa, Nobuhiro Kurio (Nissin Electric) EE2009-46 |
This paper proposes an isolated bidirectional DC-DC converter that is suitable for use in a low-voltage, large-current b... [more] | EE2009-46 pp.59-64 |
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| SDM, OME | 2008-04-11 14:05 |
Okinawa | Okinawa Seinen Kaikan | Degradation of Ga2o3-In2O3-Zno(GIZO) Thin Film Transistors Mami Fujii, Hiroshi Yano, Tomoaki Hatayama, Yukiharu Uraoka, Takashi Fuyuki (NAIST), Ji Sim Jung, Jang Yeon Kwon (Sumsung Advenced Institute of Technology) SDM2008-10 OME2008-10 |
We have investigated a degradation of Ga2O3-In2O3-ZnO（GIZO）thin film transistor under DC stress. For a positive gate bia... [more] | SDM2008-10 OME2008-10 pp.47-50 |
| EE | 2008-01-21 13:00 |
Fukuoka | On Control of DC-DC Converters Feeding to Light Load Yoshihiro Sekino EE2007-44 |
There is an inconvenience that the switching frequency increases by lightening the load when the DC-DC converters are op... [more] | EE2007-44 pp.1-6 |
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| EE | 2008-01-22 15:00 |
Fukuoka | ZVS Half Bridge Converter with a Integrated Magnetic Transformer Hideki Ito (Doshisha Univ.), Tatsuya Hosotani (Murata Manufacturing Co.), Koji Fujiwara, Yoshiyuki Ishihara, Toshiyuki Todaka (Doshisha Univ.) EE2007-61 |
We propose a novel converter with an integrated magnetic transformer. The magnetic transformer is integrated of the inpu... [more] | EE2007-61 pp.101-106 |
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| ICD, ITE-CE | 2006-01-26 10:00 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | High-Voltage Torelant Opamp Design Targeting for Future Scaled Transistors Koichi Ishida, Atit Tamtrakarn (Univ. of Tokyo), Hiroki Ishikuro (Toshiba Corp.), Takayasu Sakurai (Univ. of Tokyo) |
An outside-rail output opamp targeting for future scaled MOSFETs is designed and the 3-V-output operation is successfull... [more] | ICD2005-205 pp.1-6 |
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