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Committee Date Time Place Paper Title / Authors Abstract Paper #
DC 2008-02-08
09:50		 Tokyo Kikai-Shinko-Kaikan Bldg. Diagnostic Test Generation for Transition Faults
Takashi Aikyo, Yoshinobu Higami, Hiroshi Takahashi, Toru Kikkawa, Yuzo Takamatsu (Ehime Univ.) DC2007-69		 In modern manufacturing technologies with the shrinking of manufacturing process,
LSIs may have several metal intercon... [more]		 DC2007-69
pp.13-18
VLD, ICD, DC, IPSJ-SLDM 2005-12-01
09:55		 Fukuoka Kitakyushu International Conference Center A equidistant transition circuit for detecting path-delay faults
Hyonsu Cho, Takeo Yoshida (Univ. of the Ryukyus) 		In this paper, we propose a equidistant transition circuit for detecting path delay faults. A value of each register in ... [more] VLD2005-62 ICD2005-157 DC2005-39
pp.7-12
VLD, ICD, DC, IPSJ-SLDM 2005-12-02
09:55		 Fukuoka Kitakyushu International Conference Center A Broadside Test Generation Method for Transition Faults in Partial Scan Circuits
Tsuyoshi Iwagaki (JAIST), Satoshi Ohtake, Hideo Fujiwara (NAIST) 		This paper presents a broadside test generation method for
transition faults in partial scan circuits. In order to gene... [more]		 VLD2005-77 ICD2005-172 DC2005-54
pp.7-12
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