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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| ED | 2015-04-16 13:30 |
Miyagi | Laboratory for Nanoelectronics and Spintronics | Control of threshold voltage in printed organic thin-film transistors and their applications to circuits Rei Shiwaku, Yudai Yoshimura, Yasunori Takeda (Yamagata Univ.), Takashi Fukuda (TOSOH), Kenjiro Fukuda (Yamagata Univ./JST PRESTO), Daisuke Kumaki, Shizuo Tokito (Yamagata Univ.)  ED2015-1 |
Control of threshold voltage (VTH) in organic thin film transistors (OTFTs) is an important technique which would realiz... [more] | ED2015-1 pp.1-5 |
| VLD | 2015-03-03 15:50 |
Okinawa | Okinawa Seinen Kaikan | [Memorial Lecture]
Microarchitectural-Level Statistical Timing Models for Near-Threshold Circuit Design Jun Shiomi, Tohru Ishihara, Hidetoshi Onodera (Kyoto Univ.) VLD2014-172 |
Near-threshold computing has emerged as a promising solution for drastically improving the energy efficiency of micropro... [more] | VLD2014-172 pp.109-114 |
| RECONF, CPSY, VLD, IPSJ-SLDM [detail] | 2015-01-29 17:40 |
Kanagawa | Hiyoshi Campus, Keio University | Analyzing the Impacts of Simultaneous Supply and Threshold Voltage Tuning on Energy Dissipation in VLSI Circuits Toshihiro Takeshita, Shinichi Nishizawa, AKM Mahfuzul Islam, Tohru Ishihara, Hidetoshi Onodera (Kyoto Univ) VLD2014-129 CPSY2014-138 RECONF2014-62 |
Simultaneous supply and threshold voltage tuning has a strong impact on the energy reduction of LSI circuits. Therefore,... [more] | VLD2014-129 CPSY2014-138 RECONF2014-62 pp.111-116 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2014-11-26 16:15 |
Oita | B-ConPlaza | High speed design of sub-threshold circuit by using DTMOS Yuji Fukudome, Youhua Shi, Nozomu Togawa (Waseda Univ.), Kimiyoshi Usami (Shibaura Inst. of Tech), Masao Yanagisawa (Waseda Univ.) VLD2014-88 DC2014-42 |
Low power consumption is achieved by operating circuits in sub-threshold region. However, in sub-threshold region, the... [more] |
VLD2014-88 DC2014-42 pp.117-121 |
| ICD, SDM | 2014-08-05 14:55 |
Hokkaido | Hokkaido Univ., Multimedia Education Bldg. | Initial Frequency Degradation on Ring Oscillators in 65-nm SOTB Process Caused by Plasma-Induced Damage Azusa Oshima, Ryo Kishida, Michitarou Yabuuchi, Kazutoshi Kobayashi (KIT) SDM2014-79 ICD2014-48 |
Reliability issues, such as plasma-induced damage (PID) and Bias Temperature Instability (BTI), become dominant on inte... [more] |
SDM2014-79 ICD2014-48 pp.93-98 |
| ICD, SDM | 2014-08-05 16:10 |
Hokkaido | Hokkaido Univ., Multimedia Education Bldg. | Area-Efficient and Low-Power SAR ADC with Dynamic Comparator Threshold Configuring by Source Voltage Shifting Masaki Yonekura, Kentaro Yoshioka, Hiroki Ishikuro (Keio Univ) SDM2014-82 ICD2014-51 |
An extremely low power and area efficient threshold configuring ADC (TC-ADC) is proposed. The threshold configuring comp... [more] | SDM2014-82 ICD2014-51 pp.109-113 |
| VLD | 2014-03-05 13:25 |
Okinawa | Okinawa Seinen Kaikan | Experiment and Analysis on Temperature Dependence of Delay and Energy for Subthreshold Circuits Hiroki Kushida, Youhua Shi, Nozomu Togawa (Waseda Univ.), Kimiyoshi Usami (Shibaura Inst. of Tech.), Masao Yanagisawa (Waseda Univ.) VLD2013-161 |
Low voltage design has been used in order to reduce the energy dissipation of mobile network equipment. However, as supp... [more] | VLD2013-161 pp.147-151 |
| VLD | 2014-03-05 14:15 |
Okinawa | Okinawa Seinen Kaikan | Post –Silicon Tuning of Body Biasing and Clock Skew for Low-Voltage LSI Tatsunori Kubo, Mineo Kaneko (JASIT) VLD2013-163 |
As the device feature size decreases, operation speed increases and supply voltage decreases, variation of the signal pr... [more] | VLD2013-163 pp.159-163 |
| ICD | 2014-01-28 15:00 |
Kyoto | Kyoto Univ. Tokeidai Kinenkan | [Poster Presentation]
A Design of 0.5V Subthreshold Digital Phase Locked Loop using Simple Synchronization Unit. Kousuke Watanabe, Tomochika Harada (Yamagata Univ.) ICD2013-129 |
In this paper, we design and evaluate the 0.5V subthreshold DPLL circuit. Under synchronization, fine tuning operation i... [more] | ICD2013-129 pp.67-72 |
| IN, IA (Joint) |
2013-12-20 08:55 |
Hiroshima | Hiroshima City Univ. | A Study of Limiting Holding Time of General Telephone Calls and Threshold Control under Emergency Condition Kazuki Tanabe (Titech), Sumiko Miyata (Kanagawa Univ.), Katsunori Yamaoka (Titech) IN2013-109 |
Under emergency conditions, a threshold control method, which reserves several telephone lines to accommodate emergency ... [more] | IN2013-109 pp.59-64 |
| CAS, NLP | 2013-09-27 13:10 |
Gifu | Satellite Campus, Gifu University | Operation Verification of Adiabatic Logic in Subthreshold Region Kazunari Kato, Yasuhiro Takahashi, Toshikazu Sekine (Gifu Univ) CAS2013-50 NLP2013-62 |
Our previously proposed ultra low-power sub-threshold adiabatic logic has been a problem that noise margin is reduced, s... [more] | CAS2013-50 NLP2013-62 pp.77-82 |
| ICD, ITE-IST | 2013-07-04 10:20 |
Hokkaido | San Refre Hakodate | Intermittent Resonant Clocking Enabling Power Reduction at Any Clock Frequency for Near-Threshold Logic Circuits Hiroshi Fuketa (Univ. of Tokyo), Masahiro Nomura (STARC), Makoto Takamiya, Takayasu Sakurai (Univ. of Tokyo) ICD2013-26 |
In order to eliminate the limitation of a narrow frequency range of conventional resonant clocking, intermittent resonan... [more] | ICD2013-26 pp.13-18 |
| ICD, ITE-IST | 2013-07-05 17:40 |
Hokkaido | San Refre Hakodate | Failure mode analysis for flip-flops at low voltages Takafumi Fujita, Junya Kawashima, Masayuki Hiromoto (Kyouto Univ.), Hiroshi Tsutsui (Hokkaido Univ.), Hiroyuki Ochi (Ritsumeikan Univ.), Takashi Sato (Kyouto Univ.) ICD2013-45 |
Towards the reducing power consumption, subthreshold circuit which operates at a low voltage below the threshold voltage... [more] | ICD2013-45 pp.129-134 |
| VLD, IPSJ-SLDM | 2013-05-16 09:00 |
Fukuoka | Kitakyushu International Conference Center | Performance-driven SRAM Macro Design with Parameterized Cell Considering Layout-dependent Effects Yu Zhang, Shigetoshi Nakatake (Univ. of Kitakyushu) VLD2013-1 |
In nano-scale process, shallow trench isolation (STI) stress and well proximity effect (WPE) affect the threshold volta... [more] |
VLD2013-1 pp.1-6 |
| VLD | 2013-03-04 13:50 |
Okinawa | Okinawa Seinen Kaikan | A Logic Simplification Algorithm with Multiple Stuck-at Faults for Error Tolerant Application Junpei Kamei, Shingo Matsuki, Tsuyoshi Iwagaki, Hideyuki Ichihara, Tomoo Inoue (Hiroshima City Univ.) VLD2012-136 |
In error tolerant applications, some specific errors, which are of certain types or have severities within certain limit... [more] | VLD2012-136 pp.1-6 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2012-11-27 13:00 |
Fukuoka | Centennial Hall Kyushu University School of Medicine | Accurate I/O Buffer Impedance Self-adjustment using Threshold Voltage and Temperature Sensors Zhi Li, Hiroshi Tsutsui, Hiroyuki Ochi, Takashi Sato (Kyoto Univ.) VLD2012-79 DC2012-45 |
With the increased operating frequency and the reduction of feature size, achieving low error-rate data transmission be... [more] |
VLD2012-79 DC2012-45 pp.117-122 |
| ICD, SDM | 2012-08-02 11:25 |
Hokkaido | Sapporo Center for Gender Equality, Sapporo, Hokkaido | [Invited Talk]
Low Energy Dissipation Circuits with 0.5V Operation Voltage and Applications Hirofumi Shinohara (STARC) SDM2012-67 ICD2012-35 |
Extremely low voltage operation down to nearly or less than 0.5V has been gathering attention as a fundamental way to re... [more] | SDM2012-67 ICD2012-35 pp.23-28 |
| ICD | 2012-04-24 14:50 |
Iwate | Seion-so, Tsunagi Hot Spring (Iwate) | Device-Conscious Circuit Designs for 0.5-V High-Speed Nanoscale CMOS LSIs Akira Kotabe, Kiyoo Itoh, Riichiro Takemura, Ryuta Tsuchiya (Hitachi), Masashi Horiguchi (Renesas) ICD2012-15 |
The feasibility of 0.5-V memory-rich nanoscale CMOS LSIs was studied. First, nanoscale fully-depleted MOSFETs (FD MOS) a... [more] | ICD2012-15 pp.79-84 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2011-11-30 09:00 |
Miyazaki | NewWelCity Miyazaki | [Invited Talk]
Ultra Low Voltage Subthreshold Circuit Design Masanori Hashimoto (Osaka Univ.) VLD2011-82 DC2011-58 |
Subthreshold circuits, which are drawing attention for ultra low-power applications, are reviewed in terms of power diss... [more] | VLD2011-82 DC2011-58 pp.173-178 |
| NLP | 2011-11-09 14:30 |
Okinawa | Miyako Island Marine Terminal | Dynamics analysis of charge pump with threshold control Takato Endo, Toshimichi Saito (HU) NLP2011-101 |
This paper studies basic dynamics of charge pump circuits with a threshold control. Adjusting the threshold value, the... [more] |
NLP2011-101 pp.55-59 |
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