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Committee Date Time Place Paper Title / Authors Abstract Paper #
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]		 2011-11-30
11:20		 Miyazaki NewWelCity Miyazaki A Method of Thermal Uniformity Control During BIST
Eri Murata (NAIST), Satoshi Ohtake (Oita Univ.), Yasuhiko Nakashima (NAIST) VLD2011-86 DC2011-62		 Along with the improvement in semiconductor technology, it is important to ensure product quality that small delay defec... [more] VLD2011-86 DC2011-62
pp.197-202
DC 2011-02-14
11:50		 Tokyo Kikai-Shinko-Kaikan Bldg. A Pattern Generation Method to Uniform Initial Temperature of Test Application
Emiko Kosoegawa, Tomokazu Yoneda, Michiko Inoue, Hideo Fujiwara (NAIST/JST) DC2010-63		 Circuit failure prediction is essential to ensure product quality and in-field reliability. The basic principle of circu... [more] DC2010-63
pp.27-32
DC 2010-02-15
09:25		 Tokyo Kikai-Shinko-Kaikan Bldg. Test Pattern Re-Ordering for Thermal-Uniformity during Test
Makoto Nakao, Tomokazu Yoneda, Michiko Inoue, Hideo Fujiwara (Nara Inst. of Sci and Tech.) DC2009-66		 Power consumption during VLSI testing varies spatially and temporally, and it leads to temperature variation during tes... [more] DC2009-66
pp.7-12
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