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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| VLD | 2012-03-06 11:00 |
Oita | B-con Plaza | LSI Implementation of Heterogeneous Multi-Chip Processor for energy-saving Embedded Systems : COOL Chip Hiroyuki Uchida, Michiya Hagimoto, Tomoyuki Morimoto, Nobuyuki Hikichi, Yukoh Matsumoto (TOPS Systems), Fumito Imura, Naoya Watanabe, Katsuya Kikuchi, Motohiro Suzuki, Hiroshi Nakagawa, Masahiro Aoyagi (AIST)  VLD2011-122 |
The authors have suggested the low-power embedded heterogeneous multi-chip processor system: COOL Chip. We designed two ... [more] | VLD2011-122 pp.13-17 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2011-11-29 09:00 |
Miyazaki | NewWelCity Miyazaki | Synthesis of efficient data fetch mechanism from the high level communication description Masato Minato, Yuki Ando, Seiya Shibata (Nagoya Univ.), Tomoo Kinoshita (Soliton Systems), Shinya Honda, Hiroaki Takada (Nagoya Univ.) VLD2011-67 DC2011-43 |
This paper presents efficient data fetch mechanism for the FIFO-based implementation generated by SystemBuilder, a syste... [more] | VLD2011-67 DC2011-43 pp.91-96 |
| RECONF | 2011-09-27 09:00 |
Aichi | Nagoya Univ. | Case Studies on an FPGA with System-Level Multiprocessor Design Toolset Seiya Shibata, Yuki Ando, Shinya Honda (Nagoya Univ.), Hiroyuki Tomiyama (Ritsumeikan Univ.), Hiroaki Takada (Nagoya Univ.) RECONF2011-32 |
This paper presents a system-level multiprocessor design toolkit: SystemBuilder. SystemBuilder enables system designers... [more] | RECONF2011-32 pp.57-62 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2008-11-18 13:00 |
Fukuoka | Kitakyushu Science and Research Park | Improving the Accuracy of Rule-based Equivalence Checking of High-level Desciptions by Identifying Potential Internal Equivalences Hiroaki Yoshida, Masahiro Fujita (Univ. of Tokyo) |
Rule-based equivalence checking of high-level design descriptions proves the equivalence of two high-level design descri... [more] | VLD2008-78 DC2008-46 pp.109-114 |
| VLD, ICD | 2008-03-06 14:40 |
Okinawa | TiRuRu | A Case Study on MPEG4 Decoder Design with SystemBuilder Seiya Shibata, Shinya Honda, Hiroyuki Tomiyama, Hiroaki Takada (Nagoya Univ.) VLD2007-151 ICD2007-174 |
This paper presents a case study on designing an MPEG4 decoder system using our system-level design environment named Sy... [more] | VLD2007-151 ICD2007-174 pp.43-48 |
| VLD, ICD | 2008-03-06 15:05 |
Okinawa | TiRuRu | Performance Estimation considering False-paths for System-level Design Daisuke Ando, Takeshi Matsumoto, Tasuku Nishihara, Masahiro Fujita (Univ. of Tokyo) VLD2007-152 ICD2007-175 |
In designing today's highly complicated system-LSIs, it is essential to estimate timing information such as worst-case o... [more] | VLD2007-152 ICD2007-175 pp.49-54 |
| ICD, VLD | 2007-03-07 15:20 |
Okinawa | Mielparque Okinawa | Design Checker for System-Level Design using Extended System Dependence Graph Daisuke Ando, Takeshi Matsumoto, Tasuku Nishihara, Masahiro Fujita (Univ. of Tokyo) |
In designing system LSI or System-on-a-Chip (SoC), it is essential to find and correct design errors as early design sta... [more] | VLD2006-112 ICD2006-203 pp.37-42 |
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