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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
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Committee Date Time Place Paper Title / Authors Abstract Paper #
SDM 2015-01-27
10:50		 Tokyo Kikai-Shinko-Kaikan Bldg. [Invited Talk] High Ion/Ioff Ge-source Ultrathin Body Strained-SOI Tunnel FETs -- Impact of Channel Strain, MOS Interfaces and Back Gate on the Electrical Properties --
Minsoo Kim, Yuki K. Wakabayashi, Ryosho Nakane, Masafumi Yokoyama, Mitsuru Takenaka, Shinichi Takagi (The Univ. of Tokyo) SDM2014-137		 High performance operation of Ge-source/strained-Si-channel hetero-junction tunnel FETs is demonstrated. It is found tha... [more] SDM2014-137
pp.9-12
SDM 2009-11-13
13:00		 Tokyo Kikai-Shinko-Kaikan Bldg. [Tutorial Invited Lecture] Possible Performance of SOI Devices, their Potentiality and Prospects -- Past Constraint and Current Issues --
Yasuhisa Omura (Kansai Univ.) SDM2009-146		 This report summarizes the present stage of SOI MOSFET technology and the aim and prospect of 3-D scaled MOSFET technolo... [more] SDM2009-146
pp.61-66
SDM [detail] 2008-11-14
16:40		 Tokyo Kikai-Shinko-Kaikan Bldg. First-Principles Simulation of Electronic Bandstructures on Nanoscaled-Si Channels with Strain Effects
Tadashi Maegawa, Tsuneki Yamauchi, Takeshi Hara, Hideaki Tsuchiya, Matsuto Ogawa (Kobe Univ.) SDM2008-183		 In this paper, we present a comparative computational study on strain effects in Si nanostructures including bulk, thin ... [more] SDM2008-183
pp.83-88
SDM 2008-06-09
13:30		 Tokyo An401・402, Inst. Indus. Sci., The Univ. of Tokyo [Tutorial Lecture] Current Status and Prospects of High Mobility Channel Technologies for High performance CMOS
Shinichi Takagi (Univ. of Tokyo/MIRAI-AIST) SDM2008-42		 Saturation of CMOS performance has been evident in the present 45 nm technology and beyond because of the a variety of l... [more] SDM2008-42
pp.1-6
SDM, VLD 2006-09-26
16:15		 Tokyo Kikai-Shinko-Kaikan Bldg. To be announced
Masami Hane, Takeo Ikezawa, Michihito Kawada (NEC), Tatsuya Ezaki (Hiroshima Univ.), Toyoji Yamamoto (MIRAI-ASET) 		Simulation analysis of channel-orientation effects on strained silicon MOSFETs based on a full-band Monte Carlo method c... [more] VLD2006-50 SDM2006-171
pp.65-69
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