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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| DC | 2017-12-15 15:30 |
Akita | Akita Study Center, The Open University of Japan | A Test Clock Observation Method Using Time-to-Digital Converters for Built-In Self-Test in FPGAs Yousuke Miyake, Yasuo Sato, Seiji Kajihara (KIT)  DC2017-75 |
A delay measurement method combining a logic BIST with a variable test clock has been proposed to improve field reliabil... [more] | DC2017-75 pp.37-42 |
| RCS, SAT (Joint) |
2017-08-18 13:25 |
Niigata | Niigata Univ. | 5G Field Experimental Trial for URLLC Using New Frame Structure Masashi Iwabuchi, Anass Benjebbour, Yoshihisa Kishiyama (NTT DOCOMO), Tingjian Tian, Guangmei Ren, Chen Tang, Liang Gu, Terufumi Takada, Tsuyoshi Kashima (Huawei) RCS2017-165 |
5G and 5G+ will need to support Ultra-Reliability and Low Latency Communications (URLLC) usage scenario to enable missio... [more] | RCS2017-165 pp.117-122 |
| DC | 2017-02-21 11:35 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | Built-In Self Diagnosis Architecture for Logic Design Keisuke Kagawa, Fumiya Yano, Senling Wang, Yoshinobu Higami, Hiroshi Takahashi (Ehime Univ.), Satoshi Ohtake (Oita Univ.) DC2016-76 |
Recently, roles of automotive LSI to realize a functional safety of vehicle are increasing. In order to guarantee the fu... [more] | DC2016-76 pp.11-16 |
| ICD, SDM, ITE-IST [detail] | 2016-08-03 13:20 |
Osaka | Central Electric Club | [Invited Talk]
A 16nm FinFET Heterogeneous Nona-Core SoC Supporting Functional Safety Standard ISO26262 ASIL B Chikafumi Takahashi, Shinichi Shibahara, Kazuki Fukuoka, Jun Matsushima, Yuko Kitaji (Renesas System Design), Yasuhisa Shimazaki, Hirotaka Hara, Takahiro Irita (Renesas Electronics) SDM2016-64 ICD2016-32 |
This paper presents an SoC for the next generation of car infotainment, achieving high performance powered by nine heter... [more] | SDM2016-64 ICD2016-32 pp.105-110 |
| ET | 2015-03-14 13:40 |
Tokushima | Shikoku Univ. Plaza | Automatic Marking of Answers Handwritten on a Tablet Masaki Nakagawa, Yoshiro Uchida, Shinsuke Sasaki, Kazuhiro Mita (TUAT) ET2014-113 |
Assuming questions requiring free writing answers rather than selections are indispensable to test deep understanding by... [more] | ET2014-113 pp.157-162 |
| NC | 2015-01-29 16:05 |
Fukuoka | Kyushu Institute of Technology | Robustness of Tensor SOM for Missing Data Yasuhiro Wakita, Toru Iwasaki, Tetsuo Furukawa (Kyutech) NC2014-61 |
Tensor SOM is an extension of the self-organizing map (SOM), which enables us to visualize simultaneous visualization of... [more] | NC2014-61 pp.21-26 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2014-11-28 14:45 |
Oita | B-ConPlaza | On-chip delay measurement for FPGAs Kentaro Abe, Yousuke Miyake, Seiji Kajihara, Yasuo Sato (KIT) VLD2014-109 DC2014-63 |
This paper describes an on-chip delay measurement method that targets a logic circuit on an FPGA. While advances in semi... [more] | VLD2014-109 DC2014-63 pp.245-250 |
| MICT | 2014-10-23 15:25 |
Toyama | University of Toyama (Gofuku Campus) | Walking data acquisition using KINECT mounting robot Hiroyuki Adachi, Eijun Nakayama (Kitasato Unuv.), Makoto Sugo, Jun-ici Mizusawa (TeleBusiness limited) MICT2014-50 |
It is easily expected coming aging society necessitates many types of rehabilitation assisting tools. Aging causes the d... [more] | MICT2014-50 pp.25-30 |
| ET | 2014-10-18 11:15 |
Ishikawa | Kanazawa Univ. (Kakuma Campus) | Model of Change in Motivation of Engineering Students Takako Akakura, Takahito Tomoto (Tokyo Univ. of Science) ET2014-41 |
Factors associated with motivation to learn among engineering students were investigated. The results revealed that moti... [more] | ET2014-41 pp.23-26 |
| DC | 2014-02-10 10:30 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | Suitable Power-Aware Test Pattern Ordering for Deterministic Circular Self Test Path Ryo Ogawa, Hiroshi Iwata, Ken'ichi Yamaguchi (NNCT) DC2013-82 |
The power consumption of Very Large Scale Integrated circuit (VLSI) testing is a significant problem. The VLSI should be... [more] | DC2013-82 pp.19-24 |
| DC | 2013-12-13 13:25 |
Ishikawa | Variable Test-Timing Generation for Built-In Self-Test on FPGA Yasuo Sato, Munehiro Matsuura, Hitoshi Arakawa, Yousuke Miyake, Seiji Kajihara (Kyushu Inst. of Tech.) DC2013-69 |
This paper proposes a variable test-timing generation method that should be used for built-in self-test on FPGA. Applica... [more] | DC2013-69 pp.7-12 |
|
| PN | 2013-11-12 10:00 |
Tokyo | Waseda University | Implementation and Evaluation of Virtual Network Topology Control Based on Attractor Selection Yuki Koizumi, Shin'ichi Arakawa (Osaka Univ.), Shohei Kamamura, Daisaku Shimazaki, Koji Sasayama (NTT), Masayuki Murata (Osaka Univ.) PN2013-30 |
We have proposed a self-organized virtual topology control method that is adaptive to environmental changes in a network... [more] | PN2013-30 pp.33-38 |
| IN, NV (Joint) |
2013-07-18 15:40 |
Hokkaido | Hokkaido Univ. Faculty of Eng. Academic Lounge 3 | [Invited Talk]
Fast Algorithms for Counting the Number of Paths in a Grid Graph Hiroaki Iwashita (JST) IN2013-44 |
A path in a graph, which is also referred to as a self-avoiding walk (SAW), is a way to go from a vertex to another vert... [more] | IN2013-44 pp.49-54 |
| VLD | 2013-03-04 14:40 |
Okinawa | Okinawa Seinen Kaikan | Self-Compensation of Manufacturing Variability using On-Chip Sensors Yuma Higuchi, Masanori Hashimoto, Takao Onoye (Osaka Univ.) VLD2012-138 |
Manufacturing variability is becoming more influential on circuit performance and parametric yield, and is predicted to ... [more] | VLD2012-138 pp.13-17 |
| DC | 2013-02-13 16:40 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | Data volume reduction method for unknown value handling in built-in self test used in field Yuta Yoshimi (NAIST), Kazumi Hatayama, Yuta Yamato, Tomokazu Yoneda, Michiko Inoue (NAIST/JST) DC2012-90 |
Many approaches on test pattern compression targeted unknown value handling. It is because unknown values have impacts o... [more] | DC2012-90 pp.61-66 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2012-11-26 13:00 |
Fukuoka | Centennial Hall Kyushu University School of Medicine | [Invited Talk]
High Field Reliability Using Built-In Self Test Seiji Kajihara (Kyutech) VLD2012-65 DC2012-31 |
On-line test based on delay measurement at power-on/off time or at system idle time of a system allows us to detect dela... [more] | VLD2012-65 DC2012-31 pp.37-42 |
| TL | 2012-07-22 10:30 |
Yamagata | Yamagata University | Preservation of the Initial Analysis with Japanese Relative Clause Sentences Chie Nakamura (Keio Univ.), Manabu Arai (Univ. of Tokyo) TL2012-19 |
(Advance abstract in Japanese is available) [more] | TL2012-19 pp.53-58 |
| DC | 2012-06-22 13:50 |
Tokyo | Room B3-1 Kikai-Shinko-Kaikan Bldg | A Study on Fault Tolerant Test Pattern Generators for Reliable Built-in Self Test Yuki Fukazawa, Tsuyoshi Iwagaki, Hideyuki Ichihara, Tomoo Inoue (Hiroshima City Univ.) DC2012-11 |
In the BIST (built-in self-test) scheme, the occurrence of faults in BIST circuits, such as TPGs (test pattern generator... [more] | DC2012-11 pp.15-20 |
| PRMU, HIP | 2012-03-29 16:50 |
Hyogo | Analyzing the "●" Communication System's Effect on Users' Self-Disclosures during Tele-Communication Session Li Jen Chen, Jun Ohya (Waseda Univ.), Shunichi Yonemura (NTT), Yukio Tokunaga (Shibaura Inst. of Tech.) PRMU2011-259 HIP2011-87 |
This paper analyzes how our Prompter Communication System (PCS), which has single or several black circular images “●” e... [more] | PRMU2011-259 HIP2011-87 pp.123-128 |
|
| MW | 2012-03-02 09:30 |
Saga | Saga University | Test Production of a Dual Self-Injection-Locked Wideband and Low Phase Noise VCO Masaomi Tsuru, Kenji Kawakami, Eiji Taniguchi, Morishige Hieda (Mitsubishi Electric Corp.) MW2011-179 |
Usually, phase noise of an oscillator improves as unloaded Q-factor of resonator increases. However, its improvement is ... [more] | MW2011-179 pp.65-69 |
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