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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 20 of 105  /  [Next]  
Committee Date Time Place Paper Title / Authors Abstract Paper #
NS, IN
(Joint)
2024-03-01
14:50
Okinawa Okinawa Convention Center Real space sharing processing multihop networks
Akira Tanaka (NIT, Tokyo College), Mitsuru Maruyama (KAIT), Shigeo Urushidani (NII), Toshiaki Tsujii (OMU) NS2023-224
ICT is already widely prevalent. Along with it, processors, memories and other computational resources exist everywhere ... [more] NS2023-224
pp.306-311
SCE 2024-01-23
13:35
Tokyo Kikai-Shinko-Kaikan Bldg.
(Primary: On-site, Secondary: Online)
[Invited Talk] Research on Novel Binary Neural Processing Elements Using Single Flux Quantum Circuits
Zeyu Han, Zongyuan Li, Yamanashi Yuki, Yoshikawa Nobuyuki (Yokohama National Univ.) SCE2023-23
Superconducting convolutional neural networks, based on single flux quantum (SFQ) circuits, hold significant potential d... [more] SCE2023-23
pp.1-6
VLD, DC, RECONF, ICD, IPSJ-SLDM [detail] 2023-11-15
15:30
Kumamoto Civic Auditorium Sears Home Yume Hall
(Primary: On-site, Secondary: Online)
*
Itsuki Akeno, Hiro Yamazaki, Tetsuya Asai, Kota Ando (Hokkaido Univ) VLD2023-41 ICD2023-49 DC2023-48 RECONF2023-44
We propose a processor architecture for neural network (NN) training in edge and prototype it on an FPGA (Field--Program... [more] VLD2023-41 ICD2023-49 DC2023-48 RECONF2023-44
pp.64-69
SDM, ICD, ITE-IST [detail] 2023-08-02
09:45
Hokkaido Hokkaido Univ. Multimedia Education Bldg. 3F
(Primary: On-site, Secondary: Online)
A 1W/8R 20T SRAM Codebook for Deep Learning Processors to Reduce Main Memory Bandwidth
Ryotaro Ohara, Masaya Kabuto, Masakazu Taichi, Atsushi Fukunaga, Yuto Yasuda, Riku Hamabe, Shintaro Izumi, Hiroshi Kawaguchi (Kobe Univ) SDM2023-44 ICD2023-23
We present a 1W8R 20T multi-port memory for codebook quantisation in deep learning processors, manufactured in a 40 nm p... [more] SDM2023-44 ICD2023-23
pp.41-44
PN 2023-03-02
11:40
Okinawa
(Primary: On-site, Secondary: Online)
Distributed DDoS Protection Method in the Core Network with Reconfigurable Device Edge Coordination
Tomoki Naoi, Masaki Murakami, Yoshihiko Uematsu, Satoru Okamoto, Naoaki Yamanaka (Keidai) PN2022-58
Distributed Denial-of-Service (DDoS) attacks are a growing problem today, and it is difficult for individual users to mi... [more] PN2022-58
pp.83-89
MBE, NC 2022-12-03
15:50
Osaka Osaka Electro-Communication University A RISC-V Soft-core Processor with Custom VLIW Extension for Spiking Neural Network Accelerator
Mingyang Li, Yuki Hayashida (Mie Univ.) MBE2022-40 NC2022-62
We aim to develop an embedded accelerator for spiking neural networks (SNN). In order to develop prototypes of various S... [more] MBE2022-40 NC2022-62
pp.86-91
VLD, DC, RECONF, ICD, IPSJ-SLDM [detail] 2022-11-29
15:05
Kumamoto  
(Primary: On-site, Secondary: Online)
Evaluation of power delivery networks in secure semiconductor systems
Masaru Mashiba, Kazuki Monta (Kobe Univ.), Takaaki Okidono (SCU), Takuzi Miki, Makoto Nagata (Kobe Univ.) VLD2022-33 ICD2022-50 DC2022-49 RECONF2022-56
With the development of the IoT, hardware security is becoming increasingly important. Physical attacks on cryptoprocess... [more] VLD2022-33 ICD2022-50 DC2022-49 RECONF2022-56
pp.82-86
RISING
(3rd)
2022-10-31
13:00
Kyoto Kyoto Terrsa (Day 1), and Online (Day 2, 3) [Poster Presentation] Data Plane Implementation of trTCM in P4 Language and Its Application to Bandwidth Control of Network Slices
Fumiya Oshima, Takuji Tachibana (Univ. Fukui)
To implement network slicing, bandwidth control is needed to virtually divide a physical network. Currently, research an... [more]
CPSY, DC, IPSJ-ARC [detail] 2022-07-29
11:00
Yamaguchi Kaikyo Messe Shimonoseki
(Primary: On-site, Secondary: Online)
Efficient placement of coherence directories in memory networks
Yuki Kameyama, Naoya Niwa, Daichi Fujiki (Keio Univ.), Michihiro Koibuchi (NII), Hidearu Amano (Keio Univ.) CPSY2022-14 DC2022-14
Memory Cube (MC) is a memory module that manages three-dimensional stacking of DRAM chips with a logic layer on the bott... [more] CPSY2022-14 DC2022-14
pp.77-82
RISING
(3rd)
2021-11-16
09:30
Tokyo
(Primary: On-site, Secondary: Online)
Implementation of Traffic Control Based on traffic control with trTCM using P4
Fumiya Oshima, Takuji Tachibana (Univ. Fukui)
In order to control the quality of service (QoS) in communication networks, traffic control functions based on two rate ... [more]
CPSY, DC, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC [detail] 2021-03-25
14:40
Online Online Parallelization and Vectorization of SpMM for Sparse Neural Network
Yuta Tadokoro, Keiji Kimura, Hironori Kasahara (Waseda Univ.) CPSY2020-55 DC2020-85
Pruning is one of the well-known model compression techniques in Deep Learning. Eliminating less important weights in th... [more] CPSY2020-55 DC2020-85
pp.31-36
BioX 2020-11-25
11:10
Online Online GAN based feature-level supportive method for improved adversarial attacks on face recognition
Zhengwei Yin (USTC/Hosei Univ.), Kaoru Uchida (Hosei Univ.) BioX2020-35
With the rapid development of deep neural networks (DNN), DNN-based face recognition technologies are also achieving gre... [more] BioX2020-35
pp.1-6
NS, IN
(Joint)
2020-03-06
10:40
Okinawa Royal Hotel Okinawa Zanpa-Misaki
(Cancelled but technical report was issued)
A study of wide-area distributed IoT network system
Akira Tanaka (NIT, Tokyo College), Mitsuru Maruyama (KAIT), Shigeo Urushidani (NII) NS2019-229
Various devices and equipment have connectibility with telecommunication, mobile networks, internet and local industrial... [more] NS2019-229
pp.289-294
PN 2020-03-03
09:50
Kagoshima
(Cancelled but technical report was issued)
DDoS defense method by logically isolating attackers
Yutaka Nasu, Naoto Sumita, Masaki Murakami, Satoru Okamoto, Naoaki Yamanaka (Keio Univ.) PN2019-63
In recent years, the number of DDoS occurrences and the traffic volume have increased, and attacks have resulted in the ... [more] PN2019-63
pp.65-71
PN 2019-11-14
17:20
Kanagawa   Network-based DDoS prevention with newly developed Reconfigurable Communication Processors
Naoto Sumita, Masaki Murakami, Yu Nishio, Satoru Okamoto, Naoaki Yamanaka (Keio Univ.) PN2019-26
In order to cope with traffic growth and service diversity the Photonic Network Processor (PNP) has been proposed. As a ... [more] PN2019-26
pp.15-22
NS 2019-04-18
14:50
Kagoshima Tenmonkan Vision Hall [Invited Talk] The Trend of P4 Technology which Enable Programming of ASIC
Yuki Takei, Masato Nishiguchi, Masayuki Nishiki, Tomonori Takeda, Takayuki Fujiwara, Takamichi Kikkawa (NTT) NS2019-8
P4 is a programming language developed for the purpose of programming packet processing of network devices. It enables e... [more] NS2019-8
pp.43-48
CPSY, DC, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC [detail] 2019-03-17
16:10
Kagoshima Nishinoomote City Hall (Tanega-shima) Design of Vector Unit for AI Acceleration in Embedded Processor
Yosuke Ide, Hiromi Suzuki, Yuki Mori, Nobuyuki Yamasaki (Keio Univ.) CPSY2018-107 DC2018-89
In recent years, AI is applied in wide range of fields. Its learning and recognition are based on Neural Network (NN), w... [more] CPSY2018-107 DC2018-89
pp.167-172
EA, SIP, SP 2019-03-15
13:30
Nagasaki i+Land nagasaki (Nagasaki-shi) [Poster Presentation] Epileptic Spike Detection and Identification of Effective Frequency Band with Neural Networks
Kosuke Fukumori (TUAT), Noboru Yoshida (Juntendo Univ.), Toshihisa Tanaka (TUAT) EA2018-139 SIP2018-145 SP2018-101
Epilepsy is a complex neurological disorder and can lead to an adverse impact on an individual's cognitive functions.
I... [more]
EA2018-139 SIP2018-145 SP2018-101
pp.233-235
PN 2018-11-21
15:50
Yamanashi Satoshi Omura Museum, Yamanashi Univ. [Invited Talk] Photonic Integrated Arbitrary Unitary Converting Device for All-Optical MIMO Processing
Takuo Tanemura, Rui Tang, Ryota Tanomura, Yoshiaki Nakano (Univ. of Tokyo) PN2018-26
Optical unitary converter (OUC) is a device that can convert multiple mutually orthogonal optical modes into another set... [more] PN2018-26
pp.21-25
CPSY, DC, IPSJ-ARC
(Joint) [detail]
2018-07-30
14:30
Kumamoto Kumamoto City International Center Proposition and Implementation of RISC-V Processor with Data path extension for 10G Ethernet
Yosuke Yanai, Takeshi Matsuya, Yohei Kuga, Tokusashi Yuta, Jun Murai (Keio Univ.) CPSY2018-15
In this paper, we propose a processor with 1024 bit wide data path for packet processing. A software packet processing e... [more] CPSY2018-15
pp.33-38
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