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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| NLP, MICT, MBE, NC (Joint) [detail] |
2022-01-23 10:15 |
Online | Online | Analog CMOS implementation of majority logic for neuromorphic circuit applications Satoshi Ono, Satoshi Moriya, Yuka Kanke, Hideaki Yamamoto (Tohoku Univ.), Yasushi Yuminaka (Gunma Univ.), Shigeo Sato (Tohoku Univ.)  NC2021-41 |
A majority logic circuit is a circuit whose output is the majority value of multiple binary inputs. In addition to its c... [more] | NC2021-41 pp.45-48 |
| SDM, ICD, ITE-IST [detail] | 2021-08-18 15:35 |
Online | Online | Evaluation of Side-channel Leakage on High-speed Asynchronous Successive Approximation Register AD Converters Ryozo Takahashi, Kazuki Monta, Takuji Miki, Makoto Nagata (Kobe Univ.) SDM2021-43 ICD2021-14 |
This paper presents an evaluation of security level on high-speed asynchronous successive approximation register (SAR) a... [more] | SDM2021-43 ICD2021-14 pp.68-71 |
| SCE | 2021-08-06 14:35 |
Online | Online | Study on adiabatic quantum-flux-parametron datapaths with feedback loops adopting delay-line clocking Taiki Yamae (Yokohama Natl. Univ./JSPS Research Fellow), Naoki Takeuchi, Nobuyuki Yoshikawa (Yokohama Natl. Univ.) SCE2021-4 |
Adiabatic quantum-flux-parametron (AQFP) is a superconductor logic family which can operate with low switching energy. S... [more] | SCE2021-4 pp.14-18 |
| HCS, HIP, HI-SIGCOASTER [detail] | 2021-05-24 09:20 |
Online | Online | An Information Theory of Intelligence
-- Being Avant-garde -- Kumon Tokumaru (Writer) HCS2021-1 HIP2021-1 |
Intelligence is memory networks of knowledge and thought, which is to connect sensory input to behavior and constructed ... [more] | HCS2021-1 HIP2021-1 pp.1-4 |
| CPSY, DC, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC [detail] | 2021-03-26 11:00 |
Online | Online | An Estimation Method of a Defect Types for Suspected Fault Lines in Logical Faulty VLSI Using Neural Networks Natsuki Ota, Toshinori Hosokawa (Nihon Univ.), Koji Yamazaki (Meiji Univ.), Yukari Yamauchi, Masayuki Arai (Nihon Univ.) CPSY2020-61 DC2020-91 |
Since fault diagnosis methods for specified fault models might cause misprediction and non-prediction, a fault diagnosis... [more] | CPSY2020-61 DC2020-91 pp.67-72 |
| CPSY, DC, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC [detail] | 2021-03-26 12:00 |
Online | Online | A Logic Locking Method Based on Anti-SAT at Register Transfer Level Atsuya Tsujikawa, Toshinori Hosokawa (Nihon Univ.), Masayoshi Yoshimura (Kyoto Sangyo Univ.) CPSY2020-64 DC2020-94 |
In recent years, increasing circuit density, it has become difficult for only one semiconductor design company to design... [more] | CPSY2020-64 DC2020-94 pp.85-90 |
| SCE | 2021-01-19 13:05 |
Online | Online | [Invited Talk]
Design of serializer/deserializer circuits for adiabatic quantum-flux-parametron circuits using delay-line clocking Yuki Hironaka, Taiki Yamae, Naoki Takeuchi, Nobuyuki Yoshikawa (Yokohama Natl. Univ.) SCE2020-17 |
An adiabatic quantum-flux-parametron (AQFP) circuit is an extremely low-power Josephson logic family. A novel clocking s... [more] | SCE2020-17 pp.1-6 |
| SCE | 2021-01-19 13:55 |
Online | Online | Study and evaluation of adiabatic quantum-flux-parametron logic gates using delay-line clocking Taiki Yamae (Yokohama Natl. Univ./JSPS Research Fellow), Naoki Takeuchi, Nobuyuki Yoshikawa (Yokohama Natl. Univ.) SCE2020-19 |
Adiabatic quantum-flux-parametron (AQFP) is a superconductor logic family, which can operate with low switching energy. ... [more] | SCE2020-19 pp.13-18 |
| VLD, DC, RECONF, ICD, IPSJ-SLDM (Joint) [detail] |
2020-11-17 14:25 |
Online | Online | Variable Ordering for Minimizing Power Consumption of BDD-based Optical Logic Circuits Ryosuke Matsuo, Shin-ichi Minato (Kyoto Univ) VLD2020-24 ICD2020-44 DC2020-44 RECONF2020-43 |
Optical logic circuits based on integrated nanophotonics have attracted significant interest due to their ultra-high-spe... [more] | VLD2020-24 ICD2020-44 DC2020-44 RECONF2020-43 pp.78-83 |
| LOIS, ISEC, SITE | 2020-11-06 11:45 |
Online | Online | Encodings and Numbers of Ciphertexts in Garbled Circuits on Three-valued Logic Shunsuke Hayashi, Taroh Sasaki, Atsushi Fujioka (Kanagawa Univ.) ISEC2020-35 SITE2020-32 LOIS2020-15 |
Reducing the number of ciphertexts in a garbled circuit, a realization method of secure computation, has been researche... [more] |
ISEC2020-35 SITE2020-32 LOIS2020-15 pp.19-25 |
| HWS, VLD [detail] | 2020-03-05 11:20 |
Okinawa | Okinawa Ken Seinen Kaikan (Cancelled but technical report was issued) |
stochasitc fast estimation of timing error induced circuit lifetime distribution Hazuki Tomiyama, Yutaka Masuda, Tohru Ishihara (Nagoya Univ.) VLD2019-113 HWS2019-86 |
In VLSI design, a designer needs the integrated circuit to keep correct operation under area, power, and performance co... [more] |
VLD2019-113 HWS2019-86 pp.113-118 |
| NC, MBE (Joint) |
2020-03-06 15:20 |
Tokyo | University of Electro Communications (Cancelled but technical report was issued) |
Understanding of intelligence formation by logic circuits Shinji Karasawa (former MNCT) NC2019-114 |
The concept of intermittent and instantaneous logic circuits is useful to explain how computer or neural network works. ... [more] | NC2019-114 pp.219-224 |
| SCE | 2020-01-17 13:15 |
Kanagawa | [Poster Presentation]
A Routing Method with Wire Length Matching for RSFQ Logic Circuits Using Thin PTLs Kei Kitamura (Kyoto Univ), Kazuyoshi Takagi (Mie Univ), Naofumi Takagi (Kyoto Univ) SCE2019-35 |
A routing method with wire length matching using thin PTLs for RSFQ circuits is proposed. For AIST-ADP2 fabrication tech... [more] | SCE2019-35 pp.23-25 |
|
| SCE | 2020-01-17 13:15 |
Kanagawa | [Poster Presentation]
Design of single flux quantum highly-integrated memory cell and its application to lookup table Takuya Hosoya, Yuki Yamanashi, Nobuyuki Yoshikawa (Yokohama Natl. Univ.) SCE2019-43 |
This study focuses on a look-up table (LUT) based on a single flux quantum (SFQ) logic circuit. To realize highly-integr... [more] | SCE2019-43 pp.57-60 |
|
| SCE | 2020-01-17 13:15 |
Kanagawa | [Poster Presentation]
Design and Demonstration of a 2-input Multiplexer Using Reversible Quantum-Flux-Parametron Logic Taiki Yamae, Naoki Takeuchi, Nobuyuki Yoshikawa (Yokohama Natl. Univ.) SCE2019-51 |
Reversible quantum-flux-parametron (RQFP) is a logically and thermodynamically reversible logic gate composed of adiabat... [more] | SCE2019-51 pp.87-90 |
|
| SCE | 2020-01-17 13:15 |
Kanagawa | [Poster Presentation]
Methodology for Automating Data Feedback Circuit Synthesis for a 4- bit Counter in Adiabatic Quantum-Flux-Parametron Logic Ro Saito (YNU), Christopher L. Ayala, Olivia Chen (YNU IAS), Tomoyuki Tanaka, Tomohiro Tamura, Nobuyuki Yoshikawa (YNU) SCE2019-58 |
Adiabatic quantum-flux-parametron (AQFP) logic is one kind of superconducting logic family spotlighted as a technologica... [more] | SCE2019-58 pp.117-119 |
|
| DC | 2019-12-20 16:30 |
Wakayama | Aging Observation using On-Chip Delay Measurement in Long-term Reliability Test Yousuke Miyake, Takaaki Kato, Seiji Kajihara (Kyutech), Masao Aso, Haruji Futami, Satoshi Matsunaga (Syswave), Yukiya Miura (TMU) DC2019-85 |
Avoidance of delay-related faults due to aging phenomena is an important issue of VLSI systems. Periodical delay measure... [more] | DC2019-85 pp.37-42 |
|
| OCS, LQE, OPE | 2019-10-18 15:30 |
Kagoshima | Study on optical vortex splitter on Si substrate using optical topology Sho Okada, Tomohiro Amemiya, Koichi Saito, Hibiki Kagami, Makoto Tanaka, Nobuhiko Nishiyama (Tokyo Tech), Xiao Hu (NIMS) OCS2019-49 OPE2019-87 LQE2019-65 |
We propose an optical vortex splitter that can be integrated into a conventional silicon photonics optical circuit. The ... [more] | OCS2019-49 OPE2019-87 LQE2019-65 pp.113-118 |
|
| SCE | 2019-10-09 16:15 |
Miyagi | Design of High Timing resolution Time-to-Digital Convertor for Time-Resolving Photon Detection System using SNSPD Hiroaki Myoren, Ryotaro Kamiya, Kota Aita, Masato Naruse, Tohru Taino (Saitama Univ.), Lin Kang, Jian Chen, Peiheng Wu (Nanjing Univ.) SCE2019-26 |
Superconducting nanowire single photon detectors (SNSPDs) , those have a low dark count rate characteristics, fast and l... [more] | SCE2019-26 pp.23-26 |
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| SCE | 2019-10-10 10:50 |
Miyagi | Study of method to evaluate energy dissipation of arbitrary adiabatic quantum-flux-parametron logic gates Taiki Yamae, Naoki Takeuchi, Nobuyuki Yoshikawa (Yokohama Natl. Univ.) SCE2019-28 |
Adiabatic quantum-flux-parametron (AQFP) logic is an energy-efficient superconductor logic. It operates with zero static... [more] | SCE2019-28 pp.31-36 |
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