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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 10 of 10  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]
2014-11-26
11:10
Oita B-ConPlaza An Image Recognition System Learning Feature Regions with Vocalise
Satoru Yokota, Jiang Li, Hiromasa Kubo, Masatoshi Sekine (TUAT) RECONF2014-38
Recently much attention has been paid to image recognition systems for mobile systems. Mobile systems are used in variou... [more] RECONF2014-38
pp.25-30
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]
2014-11-27
16:25
Oita B-ConPlaza Voice Recognition System using hw/sw Complex
Yuichi Ogishima, Jiang Li, Satoru Yokota, Hiromasa Kubo, Masatoshi Sekine (TUAT) RECONF2014-43
To assign processor having big load to the FPGA which is LSI being reconfigurable to Hardware and SoftWare complex , the... [more] RECONF2014-43
pp.51-56
SIS 2011-12-15
16:00
Yamaguchi   A Reconfigurable TCP/IP Offload Engine for Networked hw/sw Complex System
Hakaru Tamukoh, Nadav Bergstein, Masatoshi Sekine (TUAT) SIS2011-48
The implementation of TCP/IP is required for various embedded applications to connect into the Internet.
However, softw... [more]
SIS2011-48
pp.47-50
SIS 2011-03-03
10:50
Tokyo Tokyo City University (Setagaya Campus) Dynamically reconfigurable platform for self-organizing neural networks
Hakaru Tamukoh, Masatoshi Sekine (TUAT) SIS2010-55
In this paper, we propose a dynamically reconfigurable platform for self-organizing neural network hardware.
In the pro... [more]
SIS2010-55
pp.13-17
SIS 2010-12-03
10:25
Nara   Networked hw/sw complex system and virtual hardware circuit of video codec
Hakaru Tamukoh, Masahiro Ariizumi, Nadav Bergstein, Masatoshi Sekine (TUAT) SIS2010-49
In this paper, we describe a design example of a networked hw/sw complex system based on the hardware object model.
In ... [more]
SIS2010-49
pp.83-88
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]
2010-11-30
13:15
Fukuoka Kyushu University Circuit Generation using High-Level Synthesis Tool in Reconfigurable HPC System Based on FPGA Arrays
Kenichi Takahashi, Jiang Li, Hiroki Isogai, Hiroki Banba, Hakaru Tamukoh, Masatoshi Sekine (TUAT) RECONF2010-39
In recent years, HPC system architectures comprised of GPUs or FPGAs are becoming common. We propose a Reconfigurable HP... [more] RECONF2010-39
pp.1-6
DC 2010-10-14
13:00
Tokyo Kikai-Shinko-Kaikan Bldg Design Example of Networked hw/sw Complex System based on Hardware Object Model
Hakaru Tamukoh, Masahiro Ariizumi, Nadav Bergstein (TUAT), Jonathan Laubriat (Universite Grenoble 1), Masatoshi Sekine (TUAT) DC2010-18
In this paper, we describe a design example of a networked hw/sw complex system based on the hardware object model.
In ... [more]
DC2010-18
pp.1-6
CAS 2010-01-28
14:15
Kyoto Kyoudai-Kaikan Bldg. Performance Evaluation of Poisson Equation and CIP Method implemented on FPGA Array
Kazuki Sato, Jiang Li, Kenichi Takahashi, Hakaru Tamukoh, Yuuichi Kobayashi, Masatoshi Sekine (Tokyo Univ. of Agr and Tech.) CAS2009-67
In recent years, the examples which use FPGA for the HPC use are increasing.
We proposed ”FPGA array” which accumulated... [more]
CAS2009-67
pp.19-24
VLD, CPSY, RECONF, IPSJ-SLDM 2009-01-29
10:05
Kanagawa   Implementation and evaluation of arithmetic circuit for Poisson equation that aims at TFlops by using FPGA array
Kazuki Sato, Baatarsuren Bars, Masatoshi Sekine (Tokyo Univ. of Agriculture and Tech.) VLD2008-94 CPSY2008-56 RECONF2008-58
In recent years, the examples which use FPGA for the HPC use are increasing. We propose FPGA array which accumulated a l... [more] VLD2008-94 CPSY2008-56 RECONF2008-58
pp.19-24
PRMU 2007-01-18
16:45
Kyoto   The Method to Describe Image by Low Dimension using the Center of Clusters on Self-Organizing Map
Ichiro Sudo, Tomomi Yuno, Masatoshi Yokokawa, Kenji Kudo, Masatoshi Sekine (TUAT)
We proposes the method of expressing the low level of the image that uses clustering by Self Organization Map (SOM) and ... [more] PRMU2006-193
pp.61-66
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