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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 9 of 9  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
RECONF 2018-05-24
14:30		 Tokyo GATE CITY OHSAKI Visibility study of CNN implementation using High Speed Serial Optical Interconnection
Juntaro Chikama, Yasuhiro Nakahara, Motoki Amagasaki, Morihiro Kuga, Msahiro Iida, Toshinori Sueyoshi (Kumamoto Univ.) RECONF2018-7		 In this research, we realize a low power consumption and scalable system by implementing CNN on multi FPGA system.To sol... [more] RECONF2018-7
pp.33-38
RECONF 2015-06-19
12:00		 Kyoto Kyoto University An Area Optimization of 3D FPGA with high speed inter-layer communication link
Yuto Takeuchi, Qian Zhao, Motoki Amagasaki, Masahiro Iida, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ) RECONF2015-4		 Three-dimensional (3D) stacking technology is attractive for providing another way to improve the performance of the lar... [more] RECONF2015-4
pp.17-22
RECONF, CPSY, VLD, IPSJ-SLDM [detail] 2015-01-30
09:30		 Kanagawa Hiyoshi Campus, Keio University Implementation and Evaluation of the Low-level Communication Mechanism on FLOPS-2D
Katsuki Kyan, Makoto Arakaki, Yusuke Hirai, Hiroki Nakasone (Univ. of the Ryukyus), Naoyuki Fujita (JAXA), Hideharu Amano (Keio Univ.), Yasunori Osana (Univ. of the Ryukyus) VLD2014-134 CPSY2014-143 RECONF2014-67		 FLOPS-2D is a multiple-FPGA computer system that consists of several FLOPS boards. Each FLOPS board has one FPGA, memory... [more] VLD2014-134 CPSY2014-143 RECONF2014-67
pp.139-143
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]		 2014-11-27
16:00		 Oita B-ConPlaza Design and Evaluation of High-speed Serial Communication Mechanism for FPGA-based ASIC Emulator
Takashi Okamoto, Morihiro Kuga, Motoki Amagasaki, Masahiro Iida, Toshinori Sueyoshi (Kumamoto Univ.) RECONF2014-42		 The circuit scale of Application Specific Integrated Circuit（ASIC）has been increasing. Therefore the shortening of funct... [more] RECONF2014-42
pp.45-50
RECONF 2014-06-12
11:15		 Miyagi Katahira Sakura Hall Three-dimensional FPGA Structure using High-speed Serial Communication
Takuya Kajiwara, Motoki Amagasaki, Masahiro Iida, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ.) RECONF2014-7		 The three-dimensional (3D) integrated circuit technology is expected to continually improve the LSI (Large Scale Integra... [more] RECONF2014-7
pp.31-36
RECONF 2013-05-21
10:10		 Kochi Kochi Prefectural Culture Hall Design and Evaluation of FPGA-based ASIC Emulator using High-speed Serial Communication
Takashige Uda, Morihiro Kuga, Motoki Amagasaki, Masahiro Iida, Toshinori Sueyoshi (Kumamoto Univ.) RECONF2013-10		 Recently, development period of ASIC is longer becouse of the increase in circuit scale.
Verification process accounts ... [more]		 RECONF2013-10
pp.49-54
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]		 2010-11-30
13:35		 Fukuoka Kyushu University Examination of the virtual wiring for an ASIC emulator using high-speed serial communication
Toshio Yabuta, Yoshihiro Ichinomiya, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ.) CPSY2010-33		 Examination of the virtual wiring for an ASIC emulator using high-speed serial communication [more] CPSY2010-33
pp.7-12
VLD, CPSY, RECONF, DC, IPSJ-SLDM, IPSJ-ARC
(Joint) [detail]		 2007-11-20
16:25		 Fukuoka Kitakyushu International Conference Center FTN Simulation Technology Based on Analysis of Frequency, Time and Noise for High-speed Serial Communication System
Goichi Ono, Takashi Takemoto, Koji Fukuda, Fumio Yuki, Ryo Nemoto, Eiichi Suzuki, Masayoshi Yagyu, Hiroki Yamashita, Tatsuya Saito (Hitachi) CPSY2007-38		 We introduce a FTN simulation technology and its circuit behavior models for a high-speed serial communication system be... [more] CPSY2007-38
pp.19-24
VLD, CPSY, RECONF, DC, IPSJ-SLDM, IPSJ-ARC
(Joint) [detail]		 2007-11-20
16:50		 Fukuoka Kitakyushu International Conference Center The Evaluation of High-speed Serial Communication System by Using FTN Simulation Technology
Takashi Takemoto, Goichi Ono, Koji Fukuda, Fumio Yuki, Ryo Nemoto, Eiichi Suzuki, Masayoshi Yagyu, Hiroki Yamashita, Tatsuya Saito (Hitachi) CPSY2007-39		 We describe a FTN simulation technology for high-speed serial interface which is high-accuracy behavior model based on a... [more] CPSY2007-39
pp.25-30
 Results 1 - 9 of 9  /   
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