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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| ICD, CPSY | 2015-12-17 14:45 |
Kyoto | Kyoto Institute of Technology | Real Time scheduling algorithm on multiprocessor system Ryuta Hayashi, Myungryun Yoo, Takanori Yokoyama (TCU)  ICD2015-68 CPSY2015-81 |
In recent embedded systems multiprocessor platforms are commonly used. Due to this background, Scheduling algorithm is d... [more] | ICD2015-68 CPSY2015-81 pp.27-32 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2015-12-03 12:05 |
Nagasaki | Nagasaki Kinro Fukushi Kaikan | A Low Latency Real-Time Execution on Dependable Responsive Multithreaded Processor II Yusuke Hatori, Kohei Osawa (Keio Univ.), Keigo Mizotani (Nintendo), Hiroyuki Chishiro, Nobuyuki Yamasaki (Keio Univ.) CPSY2015-75 |
Recent embedded real-time systems have required multiprocessors to achieve not only real-time con- straints but also hi... [more] |
CPSY2015-75 pp.81-86 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2015-12-03 13:45 |
Nagasaki | Nagasaki Kinro Fukushi Kaikan | Fast and Accurate Estimation of Execution Cycles for ARM Architecture Go Sato, Yuki Ando, Hiroaki Takada, Shinya Honda, Yutaka Matsubara (Nagoya Univ) VLD2015-73 DC2015-69 |
(To be available after the conference date) [more] | VLD2015-73 DC2015-69 pp.231-236 |
| SS | 2015-05-11 13:00 |
Kumamoto | Kumamoto University | Towards Applications of FRP in Small-Scale Embedded Systems Kensuke Sawada, Kouhei Suzuki, Takuo Watanabe (Tokyo Tech.) SS2015-1 |
In this paper, we show using examples that functional reactive programming (FRP) is beneficial for small-scale embedded ... [more] | SS2015-1 pp.1-5 |
| SS | 2015-05-11 16:30 |
Kumamoto | Kumamoto University | Modeling and Performance Verification of Embedded Software in Multiprocessor Environment Using Extended Time Petri Nets Takafumi Nakamura, Akio Nakata (Hiroshima City Univ.) SS2015-7 |
In the development of embedded software which requires high reliability satisfaction of hard requirements for both compu... [more] | SS2015-7 pp.33-37 |
| DC, CPSY | 2015-04-17 13:25 |
Tokyo | A study of processor architecture suited for intelligent sensing system Hiroki Hihara, Akira Iwasaki (Univ. of Tokyo), Masanori Hashimoto (Osaka Univ./JST CREST), Hiroyuki Ochi (Rits/JST CREST), Yukio Mitsuyama (KUT/JST CREST), Hidetoshi Onodera (Kyoto Univ./JST CREST), Hiroyuki Kanbara (ASTEM/JST CREST), Kazutoshi Wakabayashi, Takashi Takenaka, Takashi Takenaka, Hiromitsu Hada, Munehiro Tada (NEC/JST CREST) CPSY2015-8 DC2015-8 |
Sensor nodes are now important elements for the system of social infrastructure, and thus intelligent processing capabil... [more] | CPSY2015-8 DC2015-8 pp.43-48 |
|
| CPSY, IPSJ-EMB, IPSJ-SLDM, DC [detail] | 2015-03-06 14:50 |
Kagoshima | A Resource Utilization Aware Method to Improve Throughput on RMT Processor Taro Murata, Kensuke Kaneda, Masayoshi Takasu, Keigo Mizotani, Yusuke Hatori, Nobuyuki Yamasaki (Keio Univ.) CPSY2014-166 DC2014-92 |
SMT (Simultaneous MultiThreading) architecture is suitable for embedded processors which have area constraints, it is b... [more] |
CPSY2014-166 DC2014-92 pp.25-30 |
|
| CPSY, IPSJ-EMB, IPSJ-SLDM, DC [detail] | 2015-03-06 15:40 |
Kagoshima | Development of soft macro processor for embedded system Tomoyuki Sugiyama, Takahiro Sasaki, Toshio Kondo (Mie Univ.) CPSY2014-168 DC2014-94 |
Recently, to achieve high performance, low energy consumption and high reliability is required in embedded systems. But ... [more] | CPSY2014-168 DC2014-94 pp.37-42 |
|
| CPSY, IPSJ-EMB, IPSJ-SLDM, DC [detail] | 2015-03-07 10:45 |
Kagoshima | Real-Time Static Voltage and Frequency Scaling on RMT Processor with Instructions Per Clock Cycle Control Kenji Yamada, Yusuke Hatori, Shuma Hagiwara, Keigo Mizotani, Masayoshi Takasu, Nobuyuki Yamasaki (Keio Univ.) CPSY2014-179 DC2014-105 |
In Recent embedded real-time systems, not only high performance but also low power consumption is required. To meet the... [more] |
CPSY2014-179 DC2014-105 pp.101-106 |
|
| RECONF, CPSY, VLD, IPSJ-SLDM [detail] | 2015-01-30 16:30 |
Kanagawa | Hiyoshi Campus, Keio University | A Low Latency Real-Time Execution on Dependable Responsive Multithreaded Processor Keigo Mizotani, Yusuke Hatori, Yusuke Kumura, Masayoshi Takasu, Hiroyuki Chishiro, Nobuyuki Yamasaki (Keio Univ.) VLD2014-149 CPSY2014-158 RECONF2014-82 |
In recent embedded real-time systems, there are many systems with both hard real-time tasks and soft real-time tasks. Wh... [more] | VLD2014-149 CPSY2014-158 RECONF2014-82 pp.227-232 |
| ICD, CPSY | 2014-12-01 10:00 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | Consideration of SIMD Acceleration for a MIPS Instruction Processor
-- A case study of processor design contest -- Kosuke Hiraishi, Akihiro Hashimoto, Kanemitsu Ootsu, Takeshi Ohkawa, Takashi Yokota (Utsunomiya Univ.) ICD2014-73 CPSY2014-85 |
In the system development using soft core processor on an FPGA (Field Programmable Gate Array), an access to external me... [more] | ICD2014-73 CPSY2014-85 pp.1-6 |
| ICD, CPSY | 2014-12-01 15:15 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | [Poster Presentation]
A transparent on-chip instruction cache for reducing power and energy consumption of NV microcontrollers Dahoo Kim, Itaru Hida, Tetsuya Asai, Masato Motomura (Hokkaido Univ) ICD2014-82 CPSY2014-94 |
Demands for low energy microcontrollers which are used in sensor nodes have been increasing in recent years. Also most m... [more] | ICD2014-82 CPSY2014-94 p.43 |
| SS, MSS | 2014-01-30 14:25 |
Aichi | An Efficient Parametric Execution Time Analysis of Real-Time Programs Using Approximation and its Evaluation Keisuke Sugihara, Akio Nakata (Hiroshima City Univ.) MSS2013-54 SS2013-51 |
For reusing real-time software in some different execution platform, it is useful to adjust the execution time of the pr... [more] | MSS2013-54 SS2013-51 pp.17-22 |
|
| RECONF | 2013-09-18 17:00 |
Ishikawa | Japan Advanced Institute of Science and Technology | A Restricted Dynamically Reconfigurable Architecture for Low Power Processors Takeshi Hirao, Dahoo Kim, Itaru Hida, Tetsuya Asai, Masato Motomura (Hokkaido Univ.) RECONF2013-24 |
Reconfigurable processors have widely attracted attention as an approach to realize high-performance and highly energy-e... [more] | RECONF2013-24 pp.25-30 |
| ICD, IPSJ-ARC | 2013-01-31 13:45 |
Tokyo | [Invited Talk]
GPU/GPGPU trends and development approaches in DMP Eisaku Ohbuchi, Yukitaka Takemura (DMP) ICD2012-123 |
Recent mobile devices such as smart phones and tablets, adopt 3D graphics accelerator (GPU) core into application proces... [more] | ICD2012-123 pp.17-21 |
|
| SS | 2012-05-10 16:25 |
Ehime | Ehime Univ. | Throughput Performance Verification of Airship Autopilot Software: A Case Study for Evaluating Performance Verification of Software Design Model Akira Kado, Akio Nakata (Hiroshima City Univ.) SS2012-5 |
In the development of embedded systems, it is generally difficult to check, in the design phase, whether or not a design... [more] | SS2012-5 pp.25-30 |
| CPSY, DC, IPSJ-SLDM, IPSJ-EMB [detail] | 2012-03-02 15:45 |
Miyagi | Design and implementation of distributed TLB mechanism for heterogeneous multi-core processors Daiki Kawase, Kazutoshi Suito, Hiroki Matsutani, Nobuyuki Yamasaki (Keio Univ.) CPSY2011-84 DC2011-88 |
Heterogeneous multi-core architecture, in which processor cores, memory modules, and I/O modules with various sizes, fu... [more] |
CPSY2011-84 DC2011-88 pp.85-90 |
|
| CPSY, DC, IPSJ-SLDM, IPSJ-EMB [detail] | 2012-03-02 16:15 |
Miyagi | Design and implementation of I/O control mechanism for heterogeneous multi-core processors Yuki Kawaguchi, Kazutoshi Suito, Hiroki Matsutani, Nobuyuki Yamasaki (Keio Univ.) CPSY2011-85 DC2011-89 |
Heterogeneous multi-core architecture that consists of processors, memory modules, and I/O devices with various sizes, f... [more] | CPSY2011-85 DC2011-89 pp.91-96 |
|
| VLD, CPSY, RECONF, IPSJ-SLDM [detail] | 2012-01-25 14:20 |
Kanagawa | Hiyoshi Campus, Keio University | Extension of ITRON Specification OS for Multithreaded Processors Rikuhei Ueda, Kei Fujii, Hiroyuki Chishiro, Hiroki Matsutani, Nobuyuki Yamasaki (Keio Univ.) VLD2011-98 CPSY2011-61 RECONF2011-57 |
Recent advances in embedded systems have demanded high-performance under real-time constraints.Responsive Multithreaded ... [more] | VLD2011-98 CPSY2011-61 RECONF2011-57 pp.43-48 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2011-11-30 10:55 |
Miyazaki | NewWelCity Miyazaki | Inhibiting Fluctuation of Execution Time of Real Time Tasks using Tightly Coupled Memory Tomoaki Ukezono, Yuanzhe LIU, Kiyofumi Tanaka (JAIST) CPSY2011-53 |
In real-time systems, predicting execution time of each task precisely takes the systems to significance of maintainin... [more] |
CPSY2011-53 pp.59-64 |
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