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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| RECONF | 2009-05-14 13:30 |
Fukui | Real Chip Evaluation of Dynamically Reconfigurable Processor Array MuCCRA-3 Yoshihiro Yasuda, Yoshiki Saito, Toru Sano, Masaru Kato, Hideharu Amano (Keio Univ.)  RECONF2009-2 |
Dynamically Reconfigurable Processor Array(DRPA) has been received an attention as a flexible and power efficient off-lo... [more] | RECONF2009-2 pp.7-12 |
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| VLD, CPSY, RECONF, IPSJ-SLDM | 2009-01-29 08:40 |
Kanagawa | Implementation of Dynamically Reconfigurable Processor MuCCRA-3 and Methods for Reconfiguration Overhead Reduction Toru Sano, Hideharu Amano (Keio Univ) VLD2008-91 CPSY2008-53 RECONF2008-55 |
We have developed and evaluated MuCCRA-1 and 2 in order to analyze architectural trade-off in dynamically reconfigurab... [more] |
VLD2008-91 CPSY2008-53 RECONF2008-55 pp.1-6 |
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| VLD, CPSY, RECONF, IPSJ-SLDM | 2009-01-30 15:35 |
Kanagawa | Research on an Interconnection Network of the Dynamically Reconfigurable Processor: MuCCRA Masaru Kato, Toru Sano, Hideharu Amano (Keio Univ) VLD2008-122 CPSY2008-84 RECONF2008-86 |
In the MuCCRA(Multi-Core Configurable Reconfigurable Architecture) project, an architecture of configurable low-power m... [more] |
VLD2008-122 CPSY2008-84 RECONF2008-86 pp.183-188 |
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| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2008-11-18 14:30 |
Fukuoka | Kitakyushu Science and Research Park | An improvement of Black-Diamond compiler for representing target dynamically reconfigurable architecture Vasutan Tunbunheng, Hideharu Amano (Keio Univ.) RECONF2008-52 |
For developing a new dynamically reconfigurable architecture, a designer requires retargetable compiler for generating ... [more] |
RECONF2008-52 pp.75-80 |
| RECONF | 2008-09-25 13:30 |
Okayama | Okayama Univ. | Implementation of JPEG Encoder on Dynamically Reconfigurable Processor and its Evaluation Naomichi Furushima, Nobuya Watanabe, Akira Nagoya (Okayama Univ) RECONF2008-24 |
Recently, dynamically reconfigurable hardware has been attracted, the research becomes active, and quantitative evaluati... [more] | RECONF2008-24 pp.7-12 |
| RECONF | 2008-09-26 11:00 |
Okayama | Okayama Univ. | Practice Evaluation Dynamically Reconfigurable Processor MuCCRA-2β Yoshiki Saito, Masaru Kato, Shotaro Saito, Toru Sano, Keiichiro Hirai, Takashi Nishimura, Takuro Nakamura, Satoshi Tsutsumi, Yohei Hasegawa, Hideharu Amano (Keio Univ.) RECONF2008-34 |
Dynamically Reconfigurable Processing Array (DRPA) have been received an attention as a flexible and efficient off-loadi... [more] | RECONF2008-34 pp.69-74 |
| VLD, CAS, SIP | 2008-06-26 13:50 |
Hokkaido | Hokkaido Univ. | Evaluation of Dynamically Reconfigurable Processor in Implementing Sequential Execution of Image Processing Ryosuke Watanabe, Koki Abe (UEC) CAS2008-11 VLD2008-24 SIP2008-45 |
Recently, image applications are frequently executed using mobile devises, where executions with high speed at low cost ... [more] | CAS2008-11 VLD2008-24 SIP2008-45 pp.57-62 |
| RECONF | 2008-05-23 09:00 |
Fukushima | The University of Aizu | Designing And Evaluating Dynamically Reconfigurable Processor with Power Gating Technique Yoshiki Saito (Keio Univ.), Toshiaki Shirai (Shibaura Inst.), Takuro Nakamura, Takashi Nishimura, Yohei Hasegawa, Satoshi Tsutsumi (Keio Univ.), Toshihiro Kashima, Mitsutaka Nakata, Seidai Takeda, Kimiyoshi Usami (Shibaura Inst.), Hideharu Amano (Keio Univ.) RECONF2008-10 |
A dynamically reconfigurable processor achieves high performance making the best use of high degree of parallelism with ... [more] | RECONF2008-10 pp.55-60 |
| RECONF | 2008-05-23 13:50 |
Fukushima | The University of Aizu | Context Virtualization mechanism for Dynamically Reconfigurable Hardware Kengo Nishino, Takeshi Inuo, Nobuki Kajihara (NEC) RECONF2008-19 |
This paper describes a new hardware mechanism which supports context virtualization to run a task which needs the hardwa... [more] | RECONF2008-19 pp.107-112 |
| ICD, IPSJ-ARC | 2008-05-14 11:15 |
Tokyo | Design of a Multi-Context Field-Programmable VLSI Using Ferroelectric-Based Functional Pass-Gates Noriaki Idobata, Shota Ishihara, Masanori Hariyama, Michitaka Kameyama (Tohoku Univ.) ICD2008-28 |
Multi-Context FPGAs have multiple memory bits per configuration bit forming configuration planes for fast switching betw... [more] | ICD2008-28 pp.57-62 |
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| VLD, ICD | 2008-03-07 15:45 |
Okinawa | TiRuRu | A Circuit Design of Reed-Solomon Decoder using Dynamically Reconfigurable Processor Atsurou Yoshida, Yuji Higashi, Wataru Miyazaki, Teruhito Tanaka, Takashi Kambe (Kinki University) VLD2007-167 ICD2007-190 |
Reed-Solomon Decoder can correct continues error and it has been a popular technology for various devices such as commu... [more] |
VLD2007-167 ICD2007-190 pp.65-68 |
| RECONF, CPSY, VLD, IPSJ-SLDM | 2008-01-17 11:05 |
Kanagawa | Hiyoshi Campus, Keio University | Implementation of 3-D Dynamically Reconfiguarable Device using Inter-Chip Wireless Communication Shotaro Saito, Yasufumi Sugimori, Yoshinori Kohama, Tadahiro Kuroda, Yohei Hasegawa, Hideharu Amano (Keio Univ.) VLD2007-123 CPSY2007-66 RECONF2007-69 |
This paper describes the physical design and evaluation of 3-D dynamically reconfigurable processor MuCCRA-Cube which co... [more] | VLD2007-123 CPSY2007-66 RECONF2007-69 pp.31-36 |
| VLD, CPSY, RECONF, DC, IPSJ-SLDM, IPSJ-ARC (Joint) [detail] |
2007-11-21 15:05 |
Fukuoka | Kitakyushu International Conference Center | Redusing Overhead of transferring configuration data on Dynamically Reconfigurable Processor MuCCRA Takuro Nakamura, Yohei Hasegawa, Satoshi Tsutsumi, Hideharu Amano (Keio Univ.) RECONF2007-39 |
We have been developing a configurable-reconfigurable dynamically reconfigurable processor called MuCCRA. On the process... [more] | RECONF2007-39 pp.19-24 |
| VLD, CPSY, RECONF, DC, IPSJ-SLDM, IPSJ-ARC (Joint) [detail] |
2007-11-21 15:45 |
Fukuoka | Kitakyushu International Conference Center | Architecture Exploration Method for Low-Power Dynamically Reconfigurable Processors Yohei Hasegawa, Satoshi Tsutsumi, Vasutan Tunbungheng, Hideharu Amano (Keio Univ.) RECONF2007-40 |
In this paper, we propose a design and evaluation environment for exploring the configurable dynamically reconfigurable ... [more] | RECONF2007-40 pp.25-30 |
| VLD, CPSY, RECONF, DC, IPSJ-SLDM, IPSJ-ARC (Joint) [detail] |
2007-11-21 16:10 |
Fukuoka | Kitakyushu International Conference Center | Power analysis on Dynamic Reconfigurable Processor Takashi Nishimura, Yohei Hasegawa, Satoshi Tsutsumi, Hideharu Amano (Keio Univ.) RECONF2007-41 |
Dynamically Reconfigurable Processors have been expected to improve area and power eciency with the time-multiplexed ex... [more] | RECONF2007-41 pp.31-36 |
| RECONF | 2007-09-21 15:45 |
Shiga | Ritsumeikan Univ. Biwako Kusatsu Campus (Shiga) | Dynamic Reconfigurable Processor with direct execution mode Toru Sano, Yohei Hasegawa, Satoshi Tsutsumi, Hideharu Amano (Keio univ) RECONF2007-29 |
Multi-context dynamically reconfigurable processors require configuration data in the context memory to execute. It m... [more] |
RECONF2007-29 pp.83-88 |
| RECONF | 2007-09-21 16:15 |
Shiga | Ritsumeikan Univ. Biwako Kusatsu Campus (Shiga) | Representing dynamically reconfigurable architectures for placement and routing based on graphs with configuration information Vasutan Tunbunheng, Yohei Hasegawa, Satoshi Tsutsumi, Hideharu Amano (Keio Univ.) RECONF2007-30 |
For developing design environment for various types of Dynamically Reconfigurable Processor Arrays (DRPAs), the GCI (... [more] |
RECONF2007-30 pp.89-94 |
| RECONF | 2007-05-17 15:10 |
Ishikawa | Kanazawa Bunka Hall | 3-D Dynamically Reconfiguarable Device using Inter-Chip Wireless Communication MuCCRA-Cube Shotaro Saito, Yohei Hasegawa, Yoshinori Kohama, Yasufumi Sugimori, Hideharu Amano (Keio Univ.) RECONF2007-5 |
In typical dynamically reconfiguarable devices, the overhead for programmable wires often forms critical paths by stretc... [more] | RECONF2007-5 pp.25-30 |
| RECONF | 2007-05-18 09:00 |
Ishikawa | Kanazawa Bunka Hall | Techniques to decrease the Configuration Data Transfer Time in Dynamically Reconfigurable Processor MuCCRA Toru Sano, Takuro Nakamura, Satoshi Tsutsumi, Yohei Hasegawa, Hideharu Amano (Keio Univ) RECONF2007-10 |
MuCCRA(Multi-Core Configurable Reconfigurable Architecture) project aims to establish architectural techniques to devel... [more] |
RECONF2007-10 pp.55-60 |
| RECONF | 2007-05-18 09:30 |
Ishikawa | Kanazawa Bunka Hall | Power Reduction of Dynamical Reconfigurable Processor MuCCRA Keiichiro Hirai (Keio Univ.), Seidai Takeda (SIT.), Takashi Nishimura, Youhei Hasegawa, Satoshi Tsutsumi (Keio Univ.), Kimiyoshi Usami (SIT.), Hideharu Amano (Keio Univ.) RECONF2007-11 |
Although dynamically recon gurable processors have received an attention as a cost-e ective o -load engine for mobile d... [more] |
RECONF2007-11 pp.61-66 |
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