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Committee Date Time Place Paper Title / Authors Abstract Paper #
HWS, VLD 2019-02-28
13:05		 Okinawa Okinawa Ken Seinen Kaikan High-Speed and Noise-Tolerant High-Radix Tree Domino Adder Targeted to 65 nm FD-SOI Technology
Kazuki Niino, Takashi Imagawa, Hiroyuki Ochi (Ritsumeikan Univ.) VLD2018-112 HWS2018-75		 Domino logic was introduced at the forefront of the LSI market in the 2000s for high-speed circuits. In recent years, h... [more] VLD2018-112 HWS2018-75
pp.115-120
RECONF 2014-06-12
10:50		 Miyagi Katahira Sakura Hall An Asynchronous High-Performance FPGA Based on LEDR/Four-Phase-Dual-Rail Hybrid Architecture
Yoshiya Komatsu, Masanori Hariyama, Michitaka Kameyama (Tohoku Univ.) RECONF2014-6		 This paper presents an asynchronous high-performance FPGA that combines Four-Phase Dual-Rail (FPDR) protocol and Level-E... [more] RECONF2014-6
pp.27-30
VLD 2011-03-03
10:20		 Okinawa Okinawaken-Danjo-Kyodo-Sankaku Center Implementation and Security Evaluation of DPA-Resistant DES Circuit utilizing Domino-RSL technique
Katsuhiko Iwai, Kenji Kojima, Mitsuru Shiozaki, Syunsuke Asagawa, Takeshi Fujino (Ritsumeikan Univ.) VLD2010-126		 Some secure DPA-resistant techniques to protect from Side-Channel Attack such as Differential Power Analysis (DPA) have ... [more] VLD2010-126
pp.57-62
VLD 2009-03-12
09:40		 Okinawa   The implementation of DES cryptographic circuit and the evaluation of DPA attack resistance using Domino-RSL technique
Kenji Kojima, Kazuki Okuyama, Yuki Makino, Takeshi Fujino (Ritsumeikandai Univ.) VLD2008-140		 To achieve cryptographic circuit that has tamper resistance, it is necessary that we take a LSI design considered counte... [more] VLD2008-140
pp.83-88
VLD, CPSY, RECONF, DC, IPSJ-SLDM, IPSJ-ARC
(Joint) [detail]		 2007-11-20
11:20		 Fukuoka Kitakyushu International Conference Center Proposal of domino-RSL circuit which is resistant to Differential Power Analysis attack on cryptographic circuit
Yoshinobu Toyoda, Kenta Kido, Yoshiaki Shitabayashi, Takeshi Fujino (Ritsumeikan Univ.) VLD2007-77 DC2007-32		 Countermeasures against Side Channel Attack are necessary to achieve cryptographic circuit that has tamper resistance. M... [more] VLD2007-77 DC2007-32
pp.43-48
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