IEICE Technical Committee Submission System
Conference Schedule
Online Proceedings
[Sign in]
Tech. Rep. Archives
    [Japanese] / [English] 
( Committee/Place/Topics  ) --Press->
 
( Paper Keywords:  /  Column:Title Auth. Affi. Abst. Keyword ) --Press->

All Technical Committee Conferences  (Searched in: All Years)

Search Results: Conference Papers
 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 11 of 11  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
VLD, HWS, ICD 2024-02-29
12:05
Okinawa
(Primary: On-site, Secondary: Online)

Shuhei Yokota, Rikuu Hasegawa, Kazuki Monta, Takaki Okidono, Takuji Miki, Makoto Nagata (Kobe Univercity) VLD2023-112 HWS2023-72 ICD2023-101
With the rapid development of electronic technology, the level of integration of electronic devices is clearly on the ri... [more] VLD2023-112 HWS2023-72 ICD2023-101
pp.77-82
VLD, DC, RECONF, ICD, IPSJ-SLDM
(Joint) [detail]
2021-12-01
14:20
Online Online A Dual-mode SAR ADC to Detect Power Analysis Attack
Takuya Wadatsumi, Takuji Miki, Makoto Nagata (Kobe Univ.) VLD2021-30 ICD2021-40 DC2021-36 RECONF2021-38
Distributed IoT devices are exposed to unexpected interferences by physical accesses by malicious attackers. An on-chip ... [more] VLD2021-30 ICD2021-40 DC2021-36 RECONF2021-38
pp.78-82
MW 2021-03-05
11:20
Online Online A study on a high attenuation triplexer using chip components
Tatsuki Yanagawa, Shinpei Oshima (ONCT), Masaya Tamura (TUT) MW2020-93
In this study, we study a small triplexer with high attenuation performance. The specification of the triplexer is for G... [more] MW2020-93
pp.13-16
EMCJ, IEE-EMC 2013-12-20
15:50
Aichi Denso co. Estimation for 2r-port S-parameters by the r-Port Measurements
Noboru Maeda, Shinji Fukui, Takashi Naoi (NIPPON SOKEN), Kouji Ichikawa (DENSO), Toshikazu Sekine, Yasuhiro Takahashi (Gifu Univ.) EMCJ2013-107
An estimation method of the 2r-port S-parameters for reciprocal circuits is presented. In this method, several known loa... [more] EMCJ2013-107
pp.55-60
CAS 2011-01-26
11:20
Kumamoto Kumamoto University On the Energy-Aware Mapping for NoCs
Masayoshi Arai, Satoshi Tayu, Shuichi Ueno (Tokyo Inst. of Tech.) CAS2010-100
To overcome the complex communication problems that arise as the number of on-chip components increases, NoCs have been ... [more] CAS2010-100
pp.87-92
SCE, MW 2010-04-23
16:45
Tokyo Kikai-Shinko-Kaikan Bldg. A Study of Highly Integrated Quasi-millimeter Front-end Circuits
Yo Yamaguchi, Takana Kaho, Kazuhiro Uehara (NTT), Kiyomichi Araki (Tokyo Inst. Tech.) SCE2010-12 MW2010-12
In these days, broadband network infrastructure is increasing in urban areas. However, in rural areas the digital divide... [more] SCE2010-12 MW2010-12
pp.63-67
CPSY 2007-12-19
13:30
Kyoto Campus Plaza Kyoto A Lightweight Fault-tolerant Mechanism for Network-on-Chip
Michihiro Koibuchi (NII), Hiroki Matsutani, Hideharu Amano (Keio Univ), Timothy Mark Pinkston (USC) CPSY2007-42
Fault tolerance becomes a crucial factor in designing on-chip networks for modern complex chip multiprocessors. In this ... [more] CPSY2007-42
pp.9-14
EMD 2007-01-23
14:30
Tokyo   Systems approaches to surface acoustic wave devices
Takaya Watanabe (FT Design Lab.)
Surface acoustic wave devices are electronic component that united standardization with the diversification. They are th... [more] EMD2006-65
pp.7-12
RECONF 2006-09-15
11:45
Kumamoto Kumamoto Univ. A Parametric Study of Packet-Switched FPGA Overlay Networks
Daihan Wang, Hiroki Matsutani, Masato Yoshimi (Keio Univ.), Michihiro Koibuchi (NII), Hideharu Amano (Keio Univ.)
The constantly upgrading gate capacity of FPGAs
enables us to implement a complex system on a chip.
A packet-switched... [more]
RECONF2006-32
pp.31-36
MW 2006-06-27
11:20
Aichi   60GHz Subharmonic Mixer Module Using Stud Bump Bonding Technology
Kohei Masuda, Futoshi Takeuchi (Tohoku Univ.), Yasuhiro Hamada, Kenichi Maruhashi (NEC), Hiroshi Oguma, Suguru Kameda, Hiroyuki Nakase, Tadashi Takagi, Kazuo Tsubouchi (Tohoku Univ.)
60-GHz band is expected to be used for wireless personal area network with a data rate of more than 3Gbit/s. We are aim... [more] MW2006-27
pp.11-16
RCS, AP, WBS, SR, MW, MoNA
(Joint)
2006-03-03
14:40
Kanagawa YRP High-accuracy circuit design using chip components in microwave
Tsuyoshi Ogino, Naoto Yokoyama (TAIYO YUDEN), Koji Wada (Univ. of Electro-Comm.)
Both parasitic capacitance of land patterns and parasitic inductance of GND patterns significantly affect frequency prop... [more] MW2005-184
pp.33-38
 Results 1 - 11 of 11  /   
Choose a download format for default settings. [NEW !!]
Text format pLaTeX format CSV format BibTeX format
Copyright and reproduction : All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)


[Return to Top Page]

[Return to IEICE Web Page]


The Institute of Electronics, Information and Communication Engineers (IEICE), Japan