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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| VLD, DC, RECONF, ICD, IPSJ-SLDM [detail] | 2022-11-30 09:30 |
Kumamoto | (Primary: On-site, Secondary: Online) |
A contact angle estimation method using two coplanar capacitive sensors of different sizes Tsubasa Furuta, Akira Tsuchiya, Toshiyuki Inoue, Keiji Kishine (USP)  VLD2022-42 ICD2022-59 DC2022-58 RECONF2022-65 |
In this paper, we propose a contact angle estimation using coplanar capacitors. To measure the shape of droplet on a chi... [more] | VLD2022-42 ICD2022-59 DC2022-58 RECONF2022-65 pp.133-137 |
| NLP | 2022-11-24 16:40 |
Shiga | (Primary: On-site, Secondary: Online) |
Photonic reservoir computing with optical microcavities Kohei Arai, Tomoya Yamaguchi, Tomoaki Niiyama, Satoshi Sunada (Kanazawa Univ.) NLP2022-67 |
Neural networks (NNs), which mimic the function of neural circuits in the brain, use electrons to perform arithmetic ope... [more] | NLP2022-67 pp.43-48 |
| HWS, ICD | 2022-10-25 11:50 |
Shiga | (Primary: On-site, Secondary: Online) |
Optical Microscopic Observation of Semiconductor Devices toward Hardware Trojan Detection Hirofumi Sakane, Junichi Sakamoto, Shinichi Kawamura (AIST), Makoto Nagata (Kobe Univ.), Yuichi Hayashi (NAIST) HWS2022-34 ICD2022-26 |
In this paper we focus on detection of hardware Trojan (HT) in semiconductor devices under a scenario with following ste... [more] | HWS2022-34 ICD2022-26 pp.23-28 |
| CPSY, DC, IPSJ-ARC [detail] | 2022-10-12 09:00 |
Niigata | Yuzawa Toei Hotel (Primary: On-site, Secondary: Online) |
Design and Implementation of Network Protocol for Shape-Changeable Computer System Shun Nagasaki, Junichiro Kadomoto, Hidetsugu Irie, Shuichi Sakai (UTokyo) CPSY2022-21 DC2022-21 |
Shape-changeable computer system, in which a large number of computer chips arranged next to each other communicate wire... [more] | CPSY2022-21 DC2022-21 pp.20-25 |
| ICD, SDM, ITE-IST [detail] | 2022-08-08 15:20 |
Online | Evaluation of IC Chip Response by Backside Voltage Disturbance in Flip Chip Packaging Takuya Wadatsumi, Kohei Kawai, Rikuu Hasegawa (Kobe Univ.), Kikuo Muramatsu (e-SYNC), Hiromu Hasegawa, Takuya Sawada, Takahito Fukushima, Hisashi Kondo (Megachips), Takuji Miki, Makoto Nagata (Kobe Univ.) SDM2022-40 ICD2022-8 |
Flip chip packaging has become a general technique for mounting semiconductor ICs due to the need for smaller area. Howe... [more] | SDM2022-40 ICD2022-8 pp.27-30 |
|
| RECONF | 2022-06-07 14:25 |
Ibaraki | CCS, Univ. of Tsukuba (Primary: On-site, Secondary: Online) |
Performance Evaluation of Fault-Tolerant Routing Methods Using NAS Parallel Benchmarks Yota Kurokawa, Masaru Fukushi (Yamaguchi Univ.) RECONF2022-4 |
This paper proposes an evaluation method of fault-tolerant routing methods developed for Network-on-Chips (NoCs) using p... [more] | RECONF2022-4 pp.20-25 |
| MW | 2022-03-03 09:35 |
Online | Online | Chip Resistors for Heat Dissipation on RF circuits Yuta Sugiyama, Hidenori Ishibashi, Takeshi Oshima, Hidenori Yukawa, Toru Fukasawa, Toru Takahashi, Yoshio Inasawa (Mitsubishi Electric) MW2021-112 |
In this paper we present that the technology of heat dissipation for RF circuit using chip resistors. The quarter wavele... [more] | MW2021-112 pp.7-11 |
| ED, MW | 2022-01-27 14:40 |
Online | Online | [Invited Lecture]
Study of compact diplexer using common resonators consisting of coupled lines and chip capacitors Satoshi Ono, Koji Wada (UEC) ED2021-65 MW2021-107 |
A chip capacitor coupled common resonator which consisted chip capacitor loaded type coupled line resonators is proposed... [more] | ED2021-65 MW2021-107 pp.16-21 |
| RECONF, VLD, CPSY, IPSJ-ARC, IPSJ-SLDM [detail] | 2022-01-24 11:25 |
Online | Online | FPGA Implementation of Scalable Fully Coupled Annealing Processing Sysytem by Using Multi-chip Operation Kaoru Yamamoto, Takayuki Kawahara (TUS) VLD2021-53 CPSY2021-22 RECONF2021-61 |
Annealing machines can be classified into sparsely coupled types and fully coupled types. The fully coupled type has the... [more] | VLD2021-53 CPSY2021-22 RECONF2021-61 pp.25-30 |
| AP | 2021-12-16 14:25 |
Tokyo | Kikai-Shinko-Kaikan Bldg. (Primary: On-site, Secondary: Online) |
Stacked Patch Antenna Consisting of Exciting Element on Thin Layer and Parasitic Element on Substrate Takashi Maruyama, Hiroyuki Aoyama, Toru Takahashi, Masataka Otsuka (Mitsubishi Electric) AP2021-132 |
In high frequency bands like millimeter wave, antennas might be formed on wiring layers of ICs. We assume to use patch a... [more] | AP2021-132 pp.19-24 |
| VLD, DC, RECONF, ICD, IPSJ-SLDM (Joint) [detail] |
2021-12-01 10:35 |
Online | Online | Basic evaluation of ReNA, a DNN accelerator using numerical representation posit Yasuhiro Nakahara, Yuta Masuda, Masato Kiyama, Motoki Amagasaki, Masahiro Iida (Kumamoto Univ.) VLD2021-24 ICD2021-34 DC2021-30 RECONF2021-32 |
In Convolutional Neural Network (CNN) accelerators for edge, numerical precision of data should be reduced as much as po... [more] | VLD2021-24 ICD2021-34 DC2021-30 RECONF2021-32 pp.43-48 |
| VLD, DC, RECONF, ICD, IPSJ-SLDM (Joint) [detail] |
2021-12-01 15:35 |
Online | Online | Determining Optimal Number of Layers for Network-Flow-based Sample Preparation Akira Ishida, Shigeru Yamashita (Ritsumeikan Univ.) VLD2021-29 ICD2021-39 DC2021-35 RECONF2021-37 |
Sample preparation is an indispensable process when we perform biochemical experiments on DMFBs. There exists an optimal... [more] | VLD2021-29 ICD2021-39 DC2021-35 RECONF2021-37 pp.72-77 |
| VLD, DC, RECONF, ICD, IPSJ-SLDM (Joint) [detail] |
2021-12-01 14:20 |
Online | Online | A Dual-mode SAR ADC to Detect Power Analysis Attack Takuya Wadatsumi, Takuji Miki, Makoto Nagata (Kobe Univ.) VLD2021-30 ICD2021-40 DC2021-36 RECONF2021-38 |
Distributed IoT devices are exposed to unexpected interferences by physical accesses by malicious attackers. An on-chip ... [more] | VLD2021-30 ICD2021-40 DC2021-36 RECONF2021-38 pp.78-82 |
| VLD, DC, RECONF, ICD, IPSJ-SLDM (Joint) [detail] |
2021-12-01 14:45 |
Online | Online | Diagnosis of Switching-Induced IR Drop by On-Chip Voltage Monitors Kazuki (Kobe Univ.), Leonidas Kataselas (Aristotle Univ.), Ferenc Fodor (IMEC), Alkis Hatzopoulos (Aristotle Univ.), Makoto Nagata (Kobe Univ.), Erik Jan Marinissen (IMEC) VLD2021-31 ICD2021-41 DC2021-37 RECONF2021-39 |
On-chip monitor (OCM) circuits enable us to observe dynamic power-supply (PS) waveforms within power domains individuall... [more] | VLD2021-31 ICD2021-41 DC2021-37 RECONF2021-39 pp.83-86 |
| CCS | 2021-11-19 10:20 |
Osaka | Osaka Univ. (Primary: On-site, Secondary: Online) |
Network of neuron models based on ergodic cellular automaton Haruto Suzuki, Hiroyuki Torikai (Hosei Univ.) CCS2021-26 |
In this paper, a novel network of neuron models based on ergodic cellular automaton and a learning algorithm for the net... [more] | CCS2021-26 pp.49-54 |
| HWS, ICD [detail] | 2021-10-19 11:15 |
Online | Online | High-Efficiency simulation method for evaluating power noise and side-channel leakage in crypto modules Kazuki Monta, Takuji Miki, Makoto Nagata (Kobe Univ.) HWS2021-44 ICD2021-18 |
In semiconductor integrated circuits of cryptographic modules, the side-channel leakage from power supply noise is criti... [more] | HWS2021-44 ICD2021-18 pp.19-22 |
| HWS, ICD [detail] | 2021-10-19 14:20 |
Online | Online | Fundamental Study on Hardware Trojan Detection on Cable Using On-chip Sensor Yo Nishitoba, Shugo Kaji (NAIST), Masahiro Kinugawa (Fukuchiyama Univ.), Daisuke Fujimoto, Yuichi Hayshi (NAIST) HWS2021-48 ICD2021-22 |
There have been reports of threats that cause information leakage by inserting Hardware Trojans (HT) into the connection... [more] | HWS2021-48 ICD2021-22 pp.38-42 |
| RECONF | 2021-06-08 16:10 |
Online | Online | Automatic generation of executable code for ReNA Yuta Masuda, Yasuhiro Nakahara, Motoki Amagasaki, Masahiro Iida (Kumamoto Univ.) RECONF2021-6 |
We have been developing ReNA as a CNN accelerator for the edge, which is controlled by directly specifying control signa... [more] | RECONF2021-6 pp.26-31 |
| MW | 2021-03-05 11:20 |
Online | Online | A study on a high attenuation triplexer using chip components Tatsuki Yanagawa, Shinpei Oshima (ONCT), Masaya Tamura (TUT) MW2020-93 |
In this study, we study a small triplexer with high attenuation performance. The specification of the triplexer is for G... [more] | MW2020-93 pp.13-16 |
| WBS, IT, ISEC | 2021-03-04 10:15 |
Online | Online | Error Performances of Synchronous Optical Code-Division Multiple Access Schemes Using Chip-Pair Codes Tomoko K. Matsushima, Shoichiro Yamasaki, Kyohei Ono (Polytechnic Univ.) IT2020-114 ISEC2020-44 WBS2020-33 |
This paper investigates the bit error rate performance of synchronous optical code-division multiple access (CDMA) using... [more] | IT2020-114 ISEC2020-44 WBS2020-33 pp.13-18 |
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