| IEICE Technical Committee Submission System Conference Schedule |
Online Proceedings [Sign in] Tech. Rep. Archives |
All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| HWS | 2024-04-19 17:15 |
Tokyo | (Primary: On-site, Secondary: Online) |
Supply chain security of semiconductor chips and countermeasure design technologies Makoto Nagata (Kobe Univ.), Kazuki Monta (Secafy Co., Ltd.), Yuichi Hayashi (NAIST), Naofumi Homma (Tohoku Univ.)  HWS2024-7 |
This report is dedicated to the threats and countermeasures of semiconductor supply chain security, regarding the authen... [more] | HWS2024-7 pp.30-33 |
| ICD | 2024-04-12 10:45 |
Kanagawa | (Primary: On-site, Secondary: Online) |
[Invited Talk]
Recent Developments and Challenges for NAND Flash Memory Interface Takashi Toi (KIOXIA) ICD2024-11 |
(To be available after the conference date) [more] | ICD2024-11 p.36 |
| ICD | 2024-04-12 13:50 |
Kanagawa | (Primary: On-site, Secondary: Online) |
[Invited Lecture]
Development of a Bridge Chip for Scalable Performance and Capacity Storage Systems Shinichi Ikeda, Akira Iwata, Goichi Otomo, Tomoaki Suzuki, Hiroaki Iijima, Mikio Shiraishi, Shinya Kawakami, Masatomo Eimitsu, Yoshiki Matsuoka, Kiyohito Sato, Shigehiro Tsuchiya, Yoshinori Shigeta, Takuma Aoyama (Kioxia) ICD2024-14 |
We describe a Bridge Chip that enables a high-speed, high-capacity storage system. The proposed Bridge Chip employs a fu... [more] | ICD2024-14 p.43 |
| DC, CPSY, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC [detail] | 2024-03-21 09:50 |
Nagasaki | Ikinoshima Hall (Primary: On-site, Secondary: Online) |
Non-stop microprocessor with MTJ-based non-volatile devices Shota Nakabeppu, Nobuyuki Yamasaki (Keio Univ.) CPSY2023-39 DC2023-105 |
Today, various embedded systems, including automobiles, home appliances, robots, spacecraft, and sensor networks, suppor... [more] | CPSY2023-39 DC2023-105 pp.7-11 |
| VLD, HWS, ICD | 2024-02-29 12:05 |
Okinawa | (Primary: On-site, Secondary: Online) |
Shuhei Yokota, Rikuu Hasegawa, Kazuki Monta, Takaki Okidono, Takuji Miki, Makoto Nagata (Kobe Univercity) VLD2023-112 HWS2023-72 ICD2023-101 |
With the rapid development of electronic technology, the level of integration of electronic devices is clearly on the ri... [more] | VLD2023-112 HWS2023-72 ICD2023-101 pp.77-82 |
| VLD, HWS, ICD | 2024-03-01 11:15 |
Okinawa | (Primary: On-site, Secondary: Online) |
Investigation of electromagnetic irradiation noise reduction by on-chip LDOs Rikuu Hasegawa, Kazuki Monta, Takuya Wadatsumi, Takuji Miki, Makoto Nagata (Kobe Univ.) VLD2023-124 HWS2023-84 ICD2023-113 |
IC chips are subject to the threat of fault injection attacks, which cause circuit malfunctions (faults) by injecting il... [more] | VLD2023-124 HWS2023-84 ICD2023-113 pp.131-134 |
| SDM | 2024-02-21 14:10 |
Tokyo | Tokyo University-Hongo-Engineering Bldg.4 (Primary: On-site, Secondary: Online) |
[Invited Talk]
Optimization of Pre-Bonding Surface for Cu/SiCN Hybrid Bonding Kohei Nakayama, Kenta Hayama, Yutesu Kamiya, Fmihiro Inoue (YNU) SDM2023-85 |
Hybrid bonding is considered the key enabler for advanced chiplet integration, which requires finer pitch vertical conne... [more] | SDM2023-85 pp.20-26 |
| ICTSSL, CAS | 2024-01-25 15:50 |
Kanagawa | (Primary: On-site, Secondary: Online) |
Design of high-frequency diplexer robust to variations in chip elements and conductor patterns based on cutoff frequency Shotaro Nakata, Koji Wada (UEC) CAS2023-95 ICTSSL2023-48 |
In this study, the diplexer composed of LPF (Low Pass Filter) and HPF (High Pass Filter) using chip elements and conduct... [more] | CAS2023-95 ICTSSL2023-48 pp.60-65 |
| MW | 2023-12-22 11:15 |
Shizuoka | Shizuoka University (Hamamatsu Campus) (Primary: On-site, Secondary: Online) |
28 GHz band highly efficient GaAs rectenna MMIC with EM coupling structure for an external highly efficient wire antenna Naoki Sakai, Yudai Tondokoro, Akinobu Kobayashi, Keisuke Noguchi, Masaomi Tsuru, Kenji Itoh (KIT) MW2023-156 |
This paper presents the rectenna structure with a wire-loop antenna for highly efficient rectification. In the structure... [more] | MW2023-156 pp.41-47 |
| NS, RCS (Joint) |
2023-12-14 14:10 |
Fukuoka | Kyushu Institute of Technology Tobata campus, and Online (Primary: On-site, Secondary: Online) |
[Invited Talk]
A View of the Future Created by Small Atomic Clock
-- Future Technologies and Applications with Chip-Scale Optical Lattice Clock -- Hiroshi Ochi (Kyutech), Yuhei Nagao (Radrix) NS2023-132 RCS2023-185 |
Clocks or Time are essential for our modern way of life. Even though the clocks that we often use today have some time e... [more] | NS2023-132 RCS2023-185 p.41 |
| ICD, HWS | 2023-10-31 15:00 |
Mie | (Primary: On-site, Secondary: Online) |
Side-Channel Leakage Evaluation of 3D CMOS Chip Stacking Kazuki Monta, Rikuu Hasegawa, Takuji Miki, Makoto Nagata (Kobe Univ.) HWS2023-57 ICD2023-36 |
2.5D and 3D packaging are methodologies that include multiple integrated circuit (IC) chips. They deliver enhanced perfo... [more] | HWS2023-57 ICD2023-36 pp.16-19 |
| MW, AP (Joint) |
2023-09-28 16:15 |
Kochi | Kochi Castle Museum of History (Primary: On-site, Secondary: Online) |
Comparison of Transmission Characteristics of Wire Bonding and Flip Chip Bonding by Electromagnetic Simulation Takuichi Hirano (Tokyo City Univ.) MW2023-85 |
Wire bonding connections and flip-chip connections are mainly used to connect RF chips and substrates. In this paper, th... [more] | MW2023-85 pp.22-27 |
| RECONF | 2023-09-14 16:30 |
Tokyo | Tokyo University of Agriculture and Technology Koganei campus (Primary: On-site, Secondary: Online) |
RECONF2023-23 |
Several research institutes and companies have developed FPGA clusters as one of the methods for accelerating large-scal... [more] | RECONF2023-23 pp.15-17 |
| LQE, OPE, CPM, EMD, R | 2023-08-25 09:50 |
Miyagi | Tohoku university (Primary: On-site, Secondary: Online) |
[Invited Talk]
Progress and Future Prospect of Photonic Integrated Devices using InP Chip/SOI Wafer Bonding Technique Hideki Yagi (PETRA), Nobuhiko Nishiyama (Tokyo Tech), Naoki Fujiwara, Masaki Yanagisawa (PETRA) R2023-28 EMD2023-23 CPM2023-33 OPE2023-72 LQE2023-19 |
The development of beyond fifth-generation (5G) and sixth-generation (6G) mobile communication systems is accelerating t... [more] | R2023-28 EMD2023-23 CPM2023-33 OPE2023-72 LQE2023-19 pp.59-62 |
| CPSY, DC, IPSJ-ARC [detail] | 2023-08-03 16:50 |
Hokkaido | Hakodate Arena (Primary: On-site, Secondary: Online) |
Consideration of Bus Arbitration Method for Inductive Coupling Interface Hideto Kayashima, Aika Kamei (Keio Univ.), Takuya Kojima (Tokyo Univ.), Hideharu Amano (Keio Univ.) CPSY2023-17 DC2023-17 |
(To be available after the conference date) [more] | CPSY2023-17 DC2023-17 pp.55-60 |
| SDM, ICD, ITE-IST [detail] | 2023-08-01 11:10 |
Hokkaido | Hokkaido Univ. Multimedia Education Bldg. 3F (Primary: On-site, Secondary: Online) |
Evaluation on Flip-Chip Packaging for Quantum Computers at Cryogenic Temperature Misato Taguchi, Ryozo Takahashi (Kobe Univ.), Masako Kato, Nobuhiro Kusuno (Hitachi, Ltd), Takuji Miki, Makoto Nagata (Kobe Univ.) SDM2023-37 ICD2023-16 |
Quantum Computers are the most promising technologies to archive more complex calculations. At the same time, much large... [more] | SDM2023-37 ICD2023-16 pp.10-13 |
| HWS | 2023-04-14 15:10 |
Oita | (Primary: On-site, Secondary: Online) |
Electromagnetic fault injection attacks on cryptographic IC chips and analysis of internal voltage fluctuation Rikuu Hasegawa, Takuya Wadatsumi, Kazuki Monta, Takuji Miki, Makoto Nagata (Kobe Univ) HWS2023-5 |
Cryptographic IC chips are subject to the threat of fault injection attacks, which cause circuit malfunctions through in... [more] | HWS2023-5 pp.16-19 |
| HWS, VLD | 2023-03-02 09:55 |
Okinawa | (Primary: On-site, Secondary: Online) |
Implementation of power-outage tolerant VLSI system using asynchronous circuits Masashi Imai (Hirosaki Univ.) VLD2022-86 HWS2022-57 |
Re-initialization free systems which contain nonvolatile memory have been proposed in order to cope with power-outage. H... [more] | VLD2022-86 HWS2022-57 pp.79-84 |
| VLD, DC, RECONF, ICD, IPSJ-SLDM [detail] | 2022-11-28 13:05 |
Kumamoto | (Primary: On-site, Secondary: Online) |
Development of ASIC Prototype Chip Evaluation System using FPGA-SoM Masashi Imai (Hirosaki Univ.), Kenji Kise (Tokyo Tech.), Tomohiro Yoneda (NII) VLD2022-19 ICD2022-36 DC2022-35 RECONF2022-42 |
An ASIC prototype chip requires the corresponding evaluation system based on its specification, resulting in lack of ver... [more] | VLD2022-19 ICD2022-36 DC2022-35 RECONF2022-42 pp.1-6 |
| VLD, DC, RECONF, ICD, IPSJ-SLDM [detail] | 2022-11-29 15:05 |
Kumamoto | (Primary: On-site, Secondary: Online) |
Evaluation of power delivery networks in secure semiconductor systems Masaru Mashiba, Kazuki Monta (Kobe Univ.), Takaaki Okidono (SCU), Takuzi Miki, Makoto Nagata (Kobe Univ.) VLD2022-33 ICD2022-50 DC2022-49 RECONF2022-56 |
With the development of the IoT, hardware security is becoming increasingly important. Physical attacks on cryptoprocess... [more] | VLD2022-33 ICD2022-50 DC2022-49 RECONF2022-56 pp.82-86 |
[Return to Top Page]