Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
HWS, ICD |
2022-10-25 17:05 |
Shiga |
(Primary: On-site, Secondary: Online) |
How to Identify the Physical Direction of CAN Message Transmission Yosuke Maekawa, Camille Gay (TOYOTA/YNU), Tsutomu Matsumoto (YNU) HWS2022-43 ICD2022-35 |
The impact of cyber-attacks on automobiles is becoming more serious as vehicles become more connected and multi-function... [more] |
HWS2022-43 ICD2022-35 pp.76-81 |
CS |
2021-10-15 11:30 |
Online |
Online |
Rapid Reconnect Routing Algorithm Based on ACO with Area Division Xin Guan, Hidenori Nakazato (Waseda Univ.) CS2021-59 |
Mobile terminals share the majority in the current Internet usage. In this environment, the mobility need to be supporte... [more] |
CS2021-59 pp.38-43 |
IE, ICD, VLD, IPSJ-SLDM [detail] |
2014-10-02 16:15 |
Miyagi |
|
A Low Supply Voltage Six-Transistor CMOS SRAM Employing Adaptively Lowering Memory Cell Supply Voltage for "Write" Operation Nobuaki Kobayashi (Nagaoka Univ. of Tech.), Ryusuke Ito, Tadayoshi Enomoto (Chuo Univ.) VLD2014-66 ICD2014-59 IE2014-45 |
We developed and applied a new circuit, called the “Self-controllable Voltage Level (SVL)” circuit, not only to expand b... [more] |
VLD2014-66 ICD2014-59 IE2014-45 pp.33-38 |
ICD, SDM |
2014-08-05 10:25 |
Hokkaido |
Hokkaido Univ., Multimedia Education Bldg. |
Development of a Low Standby Power, Six-Transistor CMOS SRAM Employing a Single Power Supply Ryusuke Ito (Chuo Univ.), Nobuaki Kobayashi (NUT), Tadayoshi Enomoto (Chuo Univ.) SDM2014-73 ICD2014-42 |
We developed and applied a new circuit, called the “Self-controllable Voltage Level (SVL)” circuit, not only to expand b... [more] |
SDM2014-73 ICD2014-42 pp.59-64 |
VLD |
2014-03-03 16:25 |
Okinawa |
Okinawa Seinen Kaikan |
Secure scan design using improved random order scans and its evaluations Masaru Oya, Yuta Atobe, Youhua Shi, Masao Yanagisawa, Nozomu Togawa (Waseda Univ.) VLD2013-141 |
Scan test using scan chains is one of the most important DFT techniques.
On the other hand, scan-based attacks are repo... [more] |
VLD2013-141 pp.43-48 |
RECONF |
2013-05-20 17:40 |
Kochi |
Kochi Prefectural Culture Hall |
Flexible reliability mixed-grained reconfigurable architecture supporting behavioral synthesis Hiroaki Konoura, Dawood Alnajjar (Osaka Univ.), Yukio Mitsuyama (Kochi Univ. Tech.), Hiroyuki Ochi (Ritsumeikan Univ.), Takashi Imagawa (Kyoto Univ.), Shinichi Noda, Kazutoshi Wakabayashi (NEC), Masanori Hashimoto, Takao Onoye (Osaka Univ.) RECONF2013-8 |
This paper proposes a mixed-grained reconfigurable architecture
that supports C-based behavioral synthesis and flexibl... [more] |
RECONF2013-8 pp.41-46 |
IN, NS (Joint) |
2011-03-03 08:40 |
Okinawa |
Okinawa Convention Center |
Dynamic Sensing Area Partitioning in Mobile Wireless Sensor Networks Megumi Takahashi, Hiroaki Higaki (Tokyo Denki Univ.) IN2010-144 |
In most wireless sensor networks, it is not always required for sensor nodes to observe whole observation area continuou... [more] |
IN2010-144 pp.1-6 |
DC |
2009-06-19 10:45 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
Note on Yield and Area Trade-offs for MBIST in SoC Masayuki Arai, Tatsuro Endo, Kazuhiko Iwasaki (Tokyo Metro. Univ.), Michinobu Nakao, Iwao Suzuki (Renesas Tech Corp.) DC2009-11 |
In this study we evaluate the effectiveness of hardware overhead reduction of memory BIST and spare assignment algorithm... [more] |
DC2009-11 pp.7-12 |
RECONF |
2005-09-16 11:00 |
Hiroshima |
|
Evaluation of Vth Control Region Granularity in Flex Power FPGA Masakazu Hioki, Takashi Kawanami (AIST), Toshiyuki Tsutsumi (Meiji Univ.), Tadashi Nakagawa, Toshihiro Sekigawa, Hanpei Koike (AIST) |
Flex Power FPGA can flexibly control the operating speed and power consumption by the threshold voltage of transistor. T... [more] |
RECONF2005-45 pp.25-30 |
RECONF |
2005-05-12 16:15 |
Kyoto |
Kyoto University |
Area Overhead Estimation for Vth Control in Flex Power FPGA Takashi Kawanami, Masakazu Hioki (AIST), Toshiyuki Tsutsumi (AIST/MEIJI), Tadashi Nakagawa, Toshihiro Sekigawa, Hanpei Koike (AIST) |
The Flex Power FPGA is a new FPGA architecture which enabled high speed and low power consumption by controling threshol... [more] |
RECONF2005-11 pp.61-66 |