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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| VLD, DC, RECONF, ICD, IPSJ-SLDM [detail] | 2023-11-16 16:20 |
Kumamoto | Civic Auditorium Sears Home Yume Hall (Primary: On-site, Secondary: Online) |
On Reducing Area Overhead of BIST for Approximate Multiplier Considering Truncated Bits Daichi Akamatsu, Shougo Tokai, Hiroyuki Yotsuyanagi, Masaki Hashizume (Tokushima Univ.)  VLD2023-60 ICD2023-68 DC2023-67 RECONF2023-63 |
Recently, approximate computing has attracted attention as a method to reduce power and area for error-tolerant applicat... [more] | VLD2023-60 ICD2023-68 DC2023-67 RECONF2023-63 pp.156-161 |
| VLD, DC, RECONF, ICD, IPSJ-SLDM [detail] | 2022-11-28 15:00 |
Kumamoto | (Primary: On-site, Secondary: Online) |
On reduction of test patterns for a Multiplier Using Approximate Computing Shogo Tokai, Daichi Akamatsu, Hiroyuki Yotsuyanagi, Masaki Hashizume (Tokushima Univ) VLD2022-23 ICD2022-40 DC2022-39 RECONF2022-46 |
In recent years, approximate computing has been used in error-tolerant applications. Several approximation methods have ... [more] | VLD2022-23 ICD2022-40 DC2022-39 RECONF2022-46 pp.25-30 |
| RCS | 2022-06-16 14:55 |
Okinawa | University of the Ryukyus, Senbaru Campus and online (Primary: On-site, Secondary: Online) |
A study on model parameters for MIMO signal detection using learned AMP Mari Miyoshi, Toshihiko Nishimura, Takanori Sato, Takeo Ohgane, Yasutaka Ogawa, Junichiro Hagiwara (Hokkaido Univ.) RCS2022-50 |
Approximate message passing (AMP) is applicable to massive MIMO signal detection and achieves a high detection performan... [more] | RCS2022-50 pp.156-161 |
| VLD, HWS [detail] | 2022-03-07 10:00 |
Online | Online | A Heuristic Scheduling Algorithm with Variable-Cycle Approximate Operations in High-Level Synthesis Koyu Ohata, Hiroki Nishikawa, Xiangbo Kong, Hiroyuki Tomiyama (Ritsumeikan Univ.) VLD2021-78 HWS2021-55 |
This paper studies a scheduling algorithm for high-level synthesis that takes into account the difference in delay betwe... [more] | VLD2021-78 HWS2021-55 pp.13-18 |
| VLD, HWS [detail] | 2022-03-07 13:15 |
Online | Online | [Memorial Lecture]
An Accuracy Reconfigurable Vector Accelerator based on Approximate Logarithmic Multipliers Lingxiao Hou, Yutaka Masuda, Tohru Ishihara (Nagoya Univ.) VLD2021-83 HWS2021-60 |
The logarithmic approximate multiplier proposed by Mitchell provides an efficient alternative to accurate multipliers in... [more] | VLD2021-83 HWS2021-60 p.43 |
| RCS | 2021-06-23 09:50 |
Online | Online | A basic study on signal detection using learned approximate message passing Mari Miyoshi, Wakaba Tsujimoto, Toshihiko Nishimura, Takeo Ohgane, Yasutaka Ogawa, Junichiro Hagiwara, Takanori Sato (Hokkaido Univ.) RCS2021-31 |
Approximate message passing (AMP) is applicable to massive MIMO signal detection and achieves a high detection performan... [more] | RCS2021-31 pp.13-18 |
| HWS, VLD [detail] | 2021-03-03 10:25 |
Online | Online | Evaluation on Approximate Multiplier for CNN Calculation Yuechuan Zhang, Masahiro Fujita, Takashi Matsumoto (UTokyo) VLD2020-68 HWS2020-43 |
Improving the accuracy of a convolutional neural network (CNN) typically requires larger hardware with more energy consu... [more] | VLD2020-68 HWS2020-43 pp.7-12 |
| HWS, VLD [detail] | 2021-03-04 09:55 |
Online | Online | High-level synthesis of approximate circuits with two-level accuracies Kenta Shirane, Hiroki Nishikawa, Xiangbo Kong, Hiroyuki Tomiyama (Ritumeikan Univ.) VLD2020-80 HWS2020-55 |
This paper studies high-level synthesis (HLS) of approximate computing circuits with multiple accuracy levels. This work... [more] | VLD2020-80 HWS2020-55 pp.67-72 |
| HWS, VLD [detail] | 2020-03-05 16:00 |
Okinawa | Okinawa Ken Seinen Kaikan (Cancelled but technical report was issued) |
Approximate Floating Point Multiplier based on Shifting Addition Using Carry Signal from Second-Highest-Bit Jie Li, Yi Guo, Shinji Kimura (Waseda Univ.) VLD2019-120 HWS2019-93 |
Approximate computing (AC) sacrifices accuracy for better hardware performance since it relaxes the requirement of exact... [more] | VLD2019-120 HWS2019-93 pp.151-156 |
| VLD, DC, CPSY, RECONF, CPM, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC (Joint) [detail] |
2018-12-07 14:35 |
Hiroshima | Satellite Campus Hiroshima | An Efficient Multiplier Employing Time-Encoded Stochastic Computing Circuit Tati Erlina, Renyuan Zhang, Yasuhiko Nakashima (NAIST) CPSY2018-41 |
A compact multiplier circuit is designed by time-encoded stochastic computing technology. The operands of multiplication... [more] | CPSY2018-41 pp.47-52 |
| VLD, DC, CPSY, RECONF, CPM, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC (Joint) [detail] |
2017-11-06 11:20 |
Kumamoto | Kumamoto-Kenminkouryukan Parea | Considerations of Inside Structures for Approximate Multipliers Masahiro Inoue, Kaori Tajima, Hiroyuki Baba, Tongxin Yang, Tomoaki Ukezono, Toshinori Sato (Fukuoka Univ.) VLD2017-29 DC2017-35 |
Approximate arithmetic circuits are logic circuits which do not generate accurate arithmetic results.Approximate arithme... [more] | VLD2017-29 DC2017-35 pp.13-18 |
| VLD | 2017-03-01 15:30 |
Okinawa | Okinawa Seinen Kaikan | High accuracy 8*8 approximate multiplier based on OR operation Yi Guo, Heming Sun, Canran Jin, Shinji Kimura (Waseda Univ.) VLD2016-105 |
Approximate computing is a promising approach for error-tolerate applications. Multipliers contribute more area and dela... [more] | VLD2016-105 pp.19-24 |
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