Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
VLD, HWS, ICD |
2024-02-29 11:15 |
Okinawa |
(Primary: On-site, Secondary: Online) |
Design of RISC-V SoC with Post-quantum Encryption Algorithm Acceleration Jiyuan Xin, Makoto Ikeda (UTokyo) VLD2023-110 HWS2023-70 ICD2023-99 |
The foundational elements of the Internet of Things (IoT) are increasingly intricate and robust Systems-on-Chips (SoCs) ... [more] |
VLD2023-110 HWS2023-70 ICD2023-99 pp.66-71 |
VLD, HWS, ICD |
2024-03-02 10:50 |
Okinawa |
(Primary: On-site, Secondary: Online) |
Design of General Hardware for Optimal Strategy in Isogeny-Based Post-Quantum Cryptography Kosei Nakamura, Makoto Ikeda (UT) VLD2023-137 HWS2023-97 ICD2023-126 |
The computation in isogeny-based post-quantum cryptography primarily consists of two operations: scalar multiplication o... [more] |
VLD2023-137 HWS2023-97 ICD2023-126 pp.198-203 |
RECONF, VLD |
2024-01-30 13:20 |
Kanagawa |
AIRBIC Meeting Room 1-4 (Primary: On-site, Secondary: Online) |
Reduction of Circuit Size by Optimizing Status Registers in Full Hardware RTOS-Based Systems Kei Mikami, Nagisa Ishiura (Kansei Gakuin Univ.), Hiroyuki Tomiyama (Ritsumeikan Univ.), Hiroyuki Kanbara (ASTEM) VLD2023-94 RECONF2023-97 |
This article presents a technique for handling increased number of tasks by reducing both circuit size and critical path... [more] |
VLD2023-94 RECONF2023-97 pp.81-86 |
RECONF, VLD |
2024-01-30 14:50 |
Kanagawa |
AIRBIC Meeting Room 1-4 (Primary: On-site, Secondary: Online) |
FPGA-Accelerated Random Forest for Real-Time IoT Intrusion Detection Qingyu Zeng, Yuko Hara (Tokyo Tech) VLD2023-97 RECONF2023-100 |
The rapid proliferation of the Internet of Things (IoT) has heightened cyber security concerns, necessitating efficient ... [more] |
VLD2023-97 RECONF2023-100 pp.99-104 |
IE, CS, IPSJ-AVM [detail] |
2023-12-11 15:30 |
Fukuoka |
Kyushu Institute of Technology (Primary: On-site, Secondary: Online) |
[Special Invited Talk]
High-Performance Image Processing Utilizing Hardware Norishige Fukushima (nitech) CS2023-83 IE2023-25 |
High-speed image signal processing is important to realize applications in various environments.
To complete image proc... [more] |
CS2023-83 IE2023-25 p.16 |
NS |
2023-10-04 14:55 |
Hokkaido |
Hokkaidou University + Online (Primary: On-site, Secondary: Online) |
Study of high availability VPN gateway with hardware accelerator Kotomi Takahashi, Katsuma Miyamoto, Hiroki kano, Shinya Kawano, Yasuyuki matsuoka (NTT) NS2023-75 |
In recent years, the amount of VPN (Virtual Private Network) traffic has been increasing due to the spread of teleworkin... [more] |
NS2023-75 p.29 |
RECONF |
2023-08-04 14:55 |
Hokkaido |
Hakodate Arena (Primary: On-site, Secondary: Online) |
An Elastic FPGA-based Accelerator for Bayesian Network Structure Learning Ryota Miyagi (The Univ. of Tokyo), Ryota Yasudo (Kyoto Univ.), Kentaro Sano (RIKEN), Hideki Takase (The Univ. of Tokyo) RECONF2023-15 |
A Bayesian network is a powerful model for representing knowledge involving uncertainty within discrete random variables... [more] |
RECONF2023-15 pp.7-12 |
EST, MW, EMT, OPE, MWPTHz, IEE-EMT [detail] |
2023-07-21 11:00 |
Hokkaido |
Muroran Institute of Technology (Primary: On-site, Secondary: Online) |
TDBEM analysis of wake fields created by Lienard-Wiechert field at particle accelerator bunch compressor Tomohide Kawamura, Hideki Kawaguchi (Muroran Inst. Tech.) EMT2023-40 MW2023-58 OPE2023-40 EST2023-40 MWPTHz2023-36 |
X-ray free electron laser facilities are used as a light source to observe the instantaneous motion of atoms and molecul... [more] |
EMT2023-40 MW2023-58 OPE2023-40 EST2023-40 MWPTHz2023-36 pp.160-164 |
CPSY, DC, IPSJ-ARC [detail] |
2023-06-05 16:00 |
Ehime |
Nigitatsu-Kaikan (Primary: On-site, Secondary: Online) |
CPSY2023-5 DC2023-5 |
This paper describes the design of computer systems necessary for a smart city, focusing on the processing of data and c... [more] |
CPSY2023-5 DC2023-5 p.19 |
ICD |
2023-04-11 09:30 |
Kanagawa |
(Primary: On-site, Secondary: Online) |
[Invited Lecture]
Development of A Variation-Tolerant Processing-In-Memory Architecture Using Discharging Current Calibration Daiki Kitagata, Shinji Tanaka, Naoya Fujita, Naoaki Irie (REL) ICD2023-8 |
Processing-in-memory (PIM) has recently been expected to be a key technology for endpoint intelligence since it can dram... [more] |
ICD2023-8 p.16 |
HWS, VLD |
2023-03-01 13:25 |
Okinawa |
(Primary: On-site, Secondary: Online) |
Programmable Binary Hyperdimensional Computing Accelerator for Low Power Devices Yuya Isaka (NAIST), Nau Sakaguchi (SJSU), Michiko Inoue (NAIST), Michihiro Shintani (KIT) VLD2022-76 HWS2022-47 |
Hyperdimensional computing (HDC) can perform various cognitive tasks efficiently by mapping data to hyperdimensional vec... [more] |
VLD2022-76 HWS2022-47 pp.19-24 |
HWS, VLD |
2023-03-02 11:50 |
Okinawa |
(Primary: On-site, Secondary: Online) |
Automatic Synthesis of Decoupled Data Orchestration in High-Level Synthesis Masayuki Usui, Shinya Takamaeda (UTokyo) VLD2022-90 HWS2022-61 |
We automatically decouple data orchestration mechanisms in explicit data orchestration to facilitate accelerator design.... [more] |
VLD2022-90 HWS2022-61 pp.103-108 |
IPSJ-SLDM, RECONF, VLD [detail] |
2023-01-23 13:30 |
Kanagawa |
Raiosha, Hiyoshi Campus, Keio University (Primary: On-site, Secondary: Online) |
[Invited Talk]
Can we say "No FPGA, No Smart City"?
-- Let's declare if we do a smart city, we need FPGAs. -- Hiroaki Nishi (Keio Univ.) VLD2022-60 RECONF2022-83 |
From the perspective of a chair of standardization of technologies related to Smart City information infrastructure, we ... [more] |
VLD2022-60 RECONF2022-83 p.24 |
EMT, IEE-EMT |
2022-11-17 10:00 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. (Primary: On-site, Secondary: Online) |
Investigation of Electron Bunch Dynamics in Wake Fields Induced at Particle Accelerator Curved Section Hideki Kawaguchi, Tomohide Kawamura (Muroran-IT) EMT2022-44 |
In an X-ray fee-electron laser (XFEL) or linear collider, an electron beam is compressed by a bunch compressor to attain... [more] |
EMT2022-44 pp.1-5 |
HWS, ICD |
2022-10-25 15:40 |
Shiga |
(Primary: On-site, Secondary: Online) |
Hardware Acceleration of TFHE-based Adder by Controlling Error Yinfan Zhao, Ikeda Makoto (Univ. of Tokyo) HWS2022-40 ICD2022-32 |
Fully homomorphic encryption (FHE) is expected to be used in the secure delegating computation. The bootstrapping in the... [more] |
HWS2022-40 ICD2022-32 pp.58-63 |
ICD, SDM, ITE-IST [detail] |
2022-08-10 15:15 |
Online |
|
[Invited Talk]
A CMOS Image Sensor and an AI Accelerator for Realizing Edge-Computing-Based Surveillance Camera Systems Fukashi Morishita, Norihito Kato, Satoshi Okubo, Takao Toi, Mitsuru Hiraki, Sugako Otani, Hideaki Abe, Yuji Shinohara, Hiroyuki Kondo (Renesas Electronics) SDM2022-52 ICD2022-20 |
This paper presents a CMOS image sensor and an AI accelerator to realize surveillance camera systems based on edge compu... [more] |
SDM2022-52 ICD2022-20 pp.83-86 |
RECONF, VLD, CPSY, IPSJ-ARC, IPSJ-SLDM [detail] |
2022-01-24 10:20 |
Online |
Online |
Full Hardware Implementation of RTOS-Based Systems Using General-Purpose High-Level Synthesizer Takuya Ando, Yugo Ishii, Nagisa Ishiura (Kwansei Gakuin Univ.), Hiroyuki Tomiyama (Ritsumeikan Univ.), Hiroyuki Kanbara (ASTEM RI/KYOTO) VLD2021-51 CPSY2021-20 RECONF2021-59 |
This article proposes a method for implementing a whole RTOS-based system as hardware using general-purpose high-level s... [more] |
VLD2021-51 CPSY2021-20 RECONF2021-59 pp.13-18 |
RECONF, VLD, CPSY, IPSJ-ARC, IPSJ-SLDM [detail] |
2022-01-24 10:45 |
Online |
Online |
Design of Inter-Task Communication Modules for Full Hardware Implementation of RTOS-Based Systems Yukino Shinohara, Nagisa Ishiura (Kwansei Gakuin Univ.) VLD2021-52 CPSY2021-21 RECONF2021-60 |
This paper presents hardware implementation of inter-task communication functions of RTOS, in the scheme where all the t... [more] |
VLD2021-52 CPSY2021-21 RECONF2021-60 pp.19-24 |
VLD, DC, RECONF, ICD, IPSJ-SLDM (Joint) [detail] |
2021-12-01 10:10 |
Online |
Online |
A Multilayer Perceptron Training Accelerator using Systolic Array Takeshi Senoo, Akira Jinguji, Ryosuke Kuramochi, Hiroki Nakahara (Toyko Tech) VLD2021-23 ICD2021-33 DC2021-29 RECONF2021-31 |
Neural networks are being used in various applications, and the demand for fast training with large amounts of data is e... [more] |
VLD2021-23 ICD2021-33 DC2021-29 RECONF2021-31 pp.37-42 |
EMT, IEE-EMT |
2021-11-05 13:00 |
Online |
Online |
A Study on Numerical Analysis of Resistive Wall Wake fields in Accelerator Beam Pipes using Boundary Element Method Kazuhiro Fujita (Saitama IT) EMT2021-44 |
A better understanding of electromagnetic interaction of relativistic electron beams with resistive walls of accelerator... [more] |
EMT2021-44 pp.82-87 |