| IEICE Technical Committee Submission System Conference Schedule |
Online Proceedings [Sign in] Tech. Rep. Archives |
All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| VLD, DC, RECONF, ICD, IPSJ-SLDM (Joint) [detail] |
2020-11-17 09:30 |
Online | Online | Design of Nonvolatile SRAM Using SONOS Flash Cell and its Evaluation by Circuit Simulation Takaki Urabe, Koji Nii, Kazutoshi Kobayashi (KIT)  VLD2020-11 ICD2020-31 DC2020-31 RECONF2020-30 |
In this paper, we designed a layout of a nonvolatile SRAM memory using the SONOS Flash memory, and investigated its char... [more] | VLD2020-11 ICD2020-31 DC2020-31 RECONF2020-30 pp.1-5 |
| VLD, DC, RECONF, ICD, IPSJ-SLDM (Joint) [detail] |
2020-11-18 14:00 |
Online | Online | Physically Unclonable Functions(PUF) curcuit using Non-Volatile Flip-Flop and security evaluation against modeling attacks Hiroki Ishihara, Kimiyoshi Usami (Shibaura IT) VLD2020-37 ICD2020-57 DC2020-57 RECONF2020-56 |
In recent years, imitative LSIs have become a serious problem and security technology PUF to use manufacturing variabili... [more] | VLD2020-37 ICD2020-57 DC2020-57 RECONF2020-56 pp.139-144 |
| VLD, DC, RECONF, ICD, IPSJ-SLDM (Joint) [detail] |
2020-11-18 14:25 |
Online | Online | Energy Efficient Approximate Storing of Image Data for Non-volatile Memory Yoshinori Ono, Kimiyoshi Usami (SIT) VLD2020-38 ICD2020-58 DC2020-58 RECONF2020-57 |
A non-volatile memory (NVM) employing MTJ has a lot of strong points. However, it consumes a lot of energy when writing ... [more] | VLD2020-38 ICD2020-58 DC2020-58 RECONF2020-57 pp.145-150 |
| DE, IPSJ-DBS, IPSJ-IFAT | 2020-09-05 15:50 |
Online | Online | A Preliminary Study of Microbenchmarking for Performance Evaluation of Non-volatile Memory Devices Hirotaka Yoshioka, Kazuo Goda, Masaru Kitsuregawa (Univ. of Tokyo) DE2020-14 |
Non-Volatile memory (NVM) is an emerging technology, which has persistency properties similar to SSD and HDD, while prov... [more] | DE2020-14 pp.7-12 |
| CPSY, DC, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC [detail] | 2020-02-27 16:05 |
Kagoshima | Yoron-cho Chuou-Kouminkan | NDCKPT: Transparent Checkpointing on NVDIMM with Operating System Support Hikaru Nishida, Keiji Kimura (Waseda Univ.) CPSY2019-102 DC2019-108 |
Checkpointing is a technique to give a fault tolerance to applications. Some research proposed ways to checkpoint arbitr... [more] | CPSY2019-102 DC2019-108 pp.87-92 |
| SDM | 2020-02-07 11:20 |
Tokyo | Tokyo University-Hongo | [Invited Talk]
Novel Volatile Film for Precise Dual Damascene Fabrication Makoto Fujikawa, Tatsuya Yamaguchi (TTS), Yuki Kikuchi, Kaoru Maekawa (TTCA), Hiroaki Kawasaki, Yoji Iizuka (TEL) SDM2019-92 |
Abstract— Plasma induced damage on porous low-k dielectrics is a critical issue to lower the interconnect RC delay in th... [more] | SDM2019-92 pp.21-23 |
| SDM | 2020-01-28 15:45 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | [Invited Talk]
Future of Non-Volatile Memory - From Storage to Computing Kazunari Ishimaru (kioxia) SDM2019-87 |
More than thirty years passed since the first NAND flash memory was presented at the IEDM. The NAND flash memory expande... [more] | SDM2019-87 p.19 |
| PN | 2019-11-15 11:05 |
Kanagawa | [Invited Talk]
Emerging Studies in Computer Memory Systems Takahiro Hirofuchi (AIST) PN2019-28 |
This paper presents emerging studies in computer memory systems. The advent of new non-volatile memory devices, such as ... [more] | PN2019-28 pp.29-35 |
|
| VLD, DC, CPSY, RECONF, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC (Joint) [detail] |
2019-11-14 15:05 |
Ehime | Ehime Prefecture Gender Equality Center | Design of an MTJ-Based Multiply-Accumulate Operation Circuit for an Energy-Efficient Binarized Neural Networks Tomoki Chiba, Masanori Natsui, Takahiro Hanyu (Tohoku Univ.) ICD2019-32 IE2019-38 |
In this paper, we propose a design of a computational unit for multiply-accumulate (MAC) operations and activation funct... [more] | ICD2019-32 IE2019-38 pp.19-24 |
| VLD, DC, CPSY, RECONF, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC (Joint) [detail] |
2019-11-15 13:00 |
Ehime | Ehime Prefecture Gender Equality Center | [Keynote Address]
Technology Trends of Persistent Memory Satoshi Imamura (FLL) VLD2019-48 ICD2019-37 IE2019-43 CPSY2019-47 DC2019-72 RECONF2019-43 |
As the amount of data handled by applications increases every year, the demand for the larger capacity of main memory ha... [more] | VLD2019-48 ICD2019-37 IE2019-43 CPSY2019-47 DC2019-72 RECONF2019-43 p.175(VLD), p.43(ICD), p.43(IE), p.55(CPSY), p.175(DC), p.33(RECONF) |
| SDM | 2019-01-29 13:45 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | [Invited Talk]
Interface Dipole Modulation Memory based on Multi-stacked HfO2/SiO2 MOS Structure Noriyuki Miyata (AIST), Jun Nara, Takahiro Yamasaki (NIMS), Kyoko Sumita (AIST), Ryousuke Sano, Hiroshi Nohira (TCU) SDM2018-87 |
We report an electric-field-induced interface dipole modulation (IDM) in HfO2/1-ML TiO2/SiO2 MOS stack structures. Exper... [more] | SDM2018-87 pp.27-30 |
| MRIS, ITE-MMS | 2018-12-06 15:30 |
Ehime | Ehime University | Simulation analysis of the write error rate of voltage-torque MRAM Hiroshi Imamura (AIST) MRIS2018-23 |
Voltage torque MRAM, where the information is written by using the voltage control of the magntic anisotropy, has attrac... [more] | MRIS2018-23 pp.19-23 |
| VLD, DC, CPSY, RECONF, CPM, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC (Joint) [detail] |
2018-12-05 11:00 |
Hiroshima | Satellite Campus Hiroshima | [Keynote Address]
Challenge of Post CMOS Circuit Technologies for AI Hardware Takahiro Hanyu (Tohoku Univ.) |
Recently, it is impartant that the impact of artificial intelligence (AI) is being widely understood in several applicat... [more] | |
| SDM | 2018-10-17 16:05 |
Miyagi | Niche, Tohoku Univ. | Fabrication process of Hf-based MONOS nonvolatile memory with Si(100) surface flattening process Sohya Kudoh, Yusuke Horiuchi, Shun-ichiro Ohmi (Tokyo Tech.) SDM2018-55 |
We have reported nonvolatile memory characteristics of Hf-based MONOS diodes were improved by using atomically flat Si(1... [more] | SDM2018-55 pp.15-19 |
| EMD, LQE, OPE, CPM, R | 2018-08-23 15:55 |
Hokkaido | Otaru Camber of Commerce & Industry | [Invited Talk]
Highly reliable memory system realizing long-term preservation of digital data
-- The background, issues and the prospects -- Toshio Kobayashi (SIT) R2018-23 EMD2018-26 CPM2018-26 OPE2018-53 LQE2018-42 |
Digital technology based on semiconductor technology has become indispensable technology for personal living and social ... [more] | R2018-23 EMD2018-26 CPM2018-26 OPE2018-53 LQE2018-42 pp.31-36 |
| ICD | 2018-04-20 09:55 |
Tokyo | [Invited Lecture]
A new core transistor equipped with NVM functionality without using any emerging memory materials Yasuhiro Taniguchi, Shoji Yoshida, Owada Fukuo, Yutaka Shinagawa, Hideo Kasai (Floadia), Lin Jia You, Wei I Huan (PTC), Daisuke Okada, Koichi Nagasawa, Kosuke Okuyama (Floadia) ICD2018-7 |
A tri-gate core transistor which has nonvolatile memory [NVM] functionality in midsection of a logic transistor gate was... [more] | ICD2018-7 pp.23-27 |
|
| ICD | 2018-04-20 11:10 |
Tokyo | [Invited Talk]
A 512Gb 3b/Cell 3D Flash Memory on a 96-Word-Line-Layer Technology Hiroshi Maejima, Kazushige Kanda, Susumu Fujimura, Teruo Takagiwa, Susumu Ozawa, Jumpei Sato, Yoshihiko Shindo, Manabu Sato, Naoaki Kanagawa, Junji Musha, Satoshi Inoue, Katsuaki Sakurai, Toshifumi Hashimoto (TMC), Hao Nguyen, Ken Cheah, Hiroshi Sugawara, Seungpil Lee (WDC), Toshiki Hisada, Tetsuya Kaneko, Hiroshi Nakamura (TMC) ICD2018-10 |
A 512Gb 3b/cell flash has been developed on a 96-WL-layer BiCS FLASH technology. This work implements three key technolo... [more] | ICD2018-10 pp.39-44 |
|
| OME | 2017-11-17 13:00 |
Osaka | Osaka Univ. Nakanoshima Center | [Invited Talk]
Device characteristics of solution-processed top-gate organic transistors and development of nonvolatile organic memory devices Takashi Nagase, Shoya Sanda, Fumiya Shiono, Takashi Kobayashi, Hiroyoshi Naito (Osaka Pref. Univ.) OME2017-27 |
We report that the use of a top-gate/bottom-contact (TG/BC) configuration in solution-processed organic field-effect tra... [more] | OME2017-27 pp.1-6 |
| SDM | 2017-11-10 15:40 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | [Invited Talk]
A SPICE-compatible SG-MONOS model for 28nm embedded flash macro design considering the parasitic resistance caused by trapped charges Risho Koh, Mitsuru Miyamori, Katsumi Tsuneno, Tetsuya Muta, Yoshiyuki Kawashima (Renesas electronics) SDM2017-71 |
A SPICE-compatible model which reproduces the read current of split-gate MONOS (SG-MONOS) non-volatile memory cell has b... [more] | SDM2017-71 pp.53-58 |
| VLD, DC, CPSY, RECONF, CPM, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC (Joint) [detail] |
2017-11-07 09:25 |
Kumamoto | Kumamoto-Kenminkouryukan Parea | Routing method considering programming constraint of reconfigurable device using via-switch crossbars Kosei Yamaguchi, Takashi Imagawa, Hiroyuki Ochi (Ritsumeikan Univ.) VLD2017-39 DC2017-45 |
This report proposes a new routing method that considers constraint on the programming of switches in the reconfigurable... [more] | VLD2017-39 DC2017-45 pp.73-78 |
[Return to Top Page]