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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 7 of 7  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
NLP 2017-07-13
15:45
Okinawa Miyako Island Marine Terminal A Study of Image Inpainting Methods by using SD-CNN
Ryohei Mizutani, Hideharu Toda, Hisashi Aomori (Chukyo Univ.), Sathit Prasomphan (King Mongkut Univ. of Tech. North Bangkok), Mamoru Tanaka (Sophia Univ.) NLP2017-37
In recent years, the practical use of digital images have been progressed because of the popularization and advance of i... [more] NLP2017-37
pp.53-57
NLP 2012-11-20
10:00
Miyagi Ishinomaki Senshu University Creation and Annihilation of Trajectories in Discrete-Time Piecewise Constant Systems
Hisato Fujisaka, Takeshi Kamio, Kazuhisa Haeiwa (Hiroshima City Univ.) NLP2012-84
Switched-capacitor sigma-delta modulators possessing quantizers are considered as discrete-time systems with piecewise ... [more] NLP2012-84
pp.43-48
NLP, CAS 2010-08-03
15:10
Tokushima Naruto University of Education Bandpass Sigma-Delta Domain Digital Wave Filters
Takashi Yasuno, Hisato Fujisaka, Takeshi Kamio, Kazuhisa Haeiwa (Hiroshima City Univ.) CAS2010-63 NLP2010-79
The use of bandpass sigma-delta (BPSD) modulators is increasing with digitalization of communication circuits.
This pap... [more]
CAS2010-63 NLP2010-79
pp.165-170
NLP 2010-01-22
10:30
Gifu   Sorter-based Sigma-Delta Domain Exponential and Logarithm Circuits
Hisato Fujisaka, Takeshi Kamio, Chang-Jun Ahn, Kazuhisa Haeiwa (Hiroshima City Univ.) NLP2009-150
We will show first in this report an exponential circuit operating in sigma-delta domain. The circuit is based on a sort... [more] NLP2009-150
pp.59-64
SR 2007-07-27
16:55
Kanagawa   Studies on the Phase Noise and Spurious Level Behavior of an All Digital Phase Locked Loop
Michael Zamrowski (Johannes Gutenberg Univ.), Tsuyoshi Terao, Kiyomichi Araki (Tokyo Inst. of Tech.) SR2007-45
An All Digital Phase Locked Loop (ADPLL) was proposed being suitable for a CMOS processed system on one chip digital RF ... [more] SR2007-45
pp.157-162
MW, SCE 2007-04-27
09:00
Tokyo Kikai-Shinko-Kaikan Bldg. Phase Noise and Spurious Level Characteristics in All-Digital PLL
Tsuyoshi Terao, Kiyomichi Araki (Tokyo Inst. of Tech.) SCE2007-1 MW2007-1
All-Digital PLL(ADPLL) has been proposed for local oscillators of digital RF transceivers, which are suitable for CMOS s... [more] SCE2007-1 MW2007-1
pp.1-6
NLP 2006-07-03
13:20
Ishikawa Kanazawa Univ. A Spatial Domain Sigma-Delta Modulator Using Discrete Time Cellular Neural Networks
Hisashi Aomori (Sophia Univ.), Tsuyoshi Otake (Tamagawa Univ.), Nobuaki Takahashi (IBM Japan, Ltd.), Mamoru Tanaka (Sophia Univ.)
In this paper, a novel spatial domain sigma-delta modulator using discrete-time cellular neural networks (DT-CNNs) is pr... [more] NLP2006-24
pp.13-18
 Results 1 - 7 of 7  /   
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