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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| DC, CPSY, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC [detail] | 2024-03-22 09:50 |
Nagasaki | Ikinoshima Hall (Primary: On-site, Secondary: Online) |
Integration of Vector Extension and Simultaneous Multithreading for a RISC-V Processor Hidetaro Tanaka, Shogo Takata, Hironori Nakajo (TUAT)  CPSY2023-43 DC2023-109 |
In vector architectures, the potential for parallel execution lies in the chaining of instruction sequences. However, a ... [more] | CPSY2023-43 DC2023-109 pp.29-34 |
| RECONF | 2023-09-14 16:20 |
Tokyo | Tokyo University of Agriculture and Technology Koganei campus (Primary: On-site, Secondary: Online) |
Integrating RISC-V Vector Extension and SMT for Embedded AI Workloads Hidetaro Tanaka, Shogo Takata, Hironori Nakajo (TUAT) RECONF2023-22 |
In this paper, we plan to implement a processor that accelerates AI workloads by integrating RISC-V vector extensions th... [more] | RECONF2023-22 pp.13-14 |
| CPSY, DC, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC [detail] | 2022-03-11 14:30 |
Online | Online | Highly Efficient Mixed Criticality System Using Fluid Scheduling Kosuke Yashima, Nobuyuki Yamasaki (Keio Univ.) CPSY2021-64 DC2021-98 |
In recent real-time systems, it is necessary to deal with tasks whose execution time varies depending on the situation. ... [more] |
CPSY2021-64 DC2021-98 pp.115-119 |
| VLD, DC, CPSY, RECONF, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC (Joint) [detail] |
2019-11-15 16:10 |
Ehime | Ehime Prefecture Gender Equality Center | Low Latency Interrupt Handling Scheme By Using Interrupt Wake-Up Mechanism Ryo Wada, Nobuyuki Yamasaki (Keio Univ.) CPSY2019-50 |
Recently, embedded real-time systems used in spacecraft and automobiles have become increasingly complex and are require... [more] | CPSY2019-50 pp.71-76 |
| CPSY, DC, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC [detail] | 2019-03-17 15:50 |
Kagoshima | Nishinoomote City Hall (Tanega-shima) | Real-Time Voltage and Frequency Scaling Scheme with IPC Controlling for SMT Processor Hiromi Suzuki, Yousuke Ide, Yuta Tsukahara, Nobuyuki Yamasaki (Keio Univ) CPSY2018-106 DC2018-88 |
In the field of Real-Time embedded systems, both of high-performance and low-power consumption are required. In this pap... [more] | CPSY2018-106 DC2018-88 pp.161-166 |
| VLD, CPSY, RECONF, IPSJ-SLDM [detail] | 2012-01-25 13:55 |
Kanagawa | Hiyoshi Campus, Keio University | An IPC Control Mechanism for Real-Time Processing on a Prioritized SMT Processor Kensuke Kaneda, Kohei Matsumoto, Nobuyuki Yamasaki (Keio Univ) VLD2011-97 CPSY2011-60 RECONF2011-56 |
Although the SMT processor which performs two or more threads simultaneously can improve total throughput, the execution... [more] | VLD2011-97 CPSY2011-60 RECONF2011-56 pp.37-42 |
| VLD, CPSY, RECONF, IPSJ-SLDM [detail] | 2012-01-25 14:20 |
Kanagawa | Hiyoshi Campus, Keio University | Extension of ITRON Specification OS for Multithreaded Processors Rikuhei Ueda, Kei Fujii, Hiroyuki Chishiro, Hiroki Matsutani, Nobuyuki Yamasaki (Keio Univ.) VLD2011-98 CPSY2011-61 RECONF2011-57 |
Recent advances in embedded systems have demanded high-performance under real-time constraints.Responsive Multithreaded ... [more] | VLD2011-98 CPSY2011-61 RECONF2011-57 pp.43-48 |
| CPSY | 2008-12-18 13:15 |
Kyoto | KYOTO Research Park | [Special Invited Talk]
An Introduction of Our Recent Research on VLIW from 3way to 9Nway Yasuhiko Nakashima (NAIST) CPSY2008-48 |
The first VLIW revealed as a hardware structure that could directly execute horizontal micro codes has been raised to on... [more] | CPSY2008-48 pp.31-36 |
| RECONF | 2005-05-12 11:00 |
Kyoto | Kyoto University | Implementation of an SMT Processor and its Reconfigurable Cache with FPGA Yoshiyasu Ogasawara, Norito Kato, Masanori Yamato, Mikiko Sato, Koichi Sasada, Kaname Uchikura, Mitaro Namiki, Hironori Nakajo (Tokyo University of Agriculture and Technology) |
Recently, it becomes possible to implement a large-scale processor due to speed-up and large-scale integrity of an FPG... [more] |
RECONF2005-4 pp.19-24 |
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